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For the Inventor, By the Inventor

Longmont, CO, United States of America

W Story Leavesley, Iii

USPTO Granted Patents = 10

Average Co-Inventor Count = 2.8

ph-index = 7

Forward Citations = 181(Granted Patents)


Company Filing History:

goldMedal10 out of 5,007 
 
Xilinx, Inc.
 patents

Years Active: 2008-2012

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10 patents (USPTO):Explore Patents
1. 8332788 - Generating a module interface for partial reconfiguration design flows (2012-12-11),
2. 8286113 - Verification of logic core implementation (2012-10-09),
3. 7941777 - Generating a module interface for partial reconfiguration design flows (2011-05-10),
4. 7810055 - Design independent correlation data storage for use with physical design of programmable logic devices (2010-10-05),
5. 7620927 - Method and apparatus for circuit design closure using partitions (2009-11-17),
6. 7619442 - Versatile bus interface macro for dynamically reconfigurable designs (2009-11-17),
7. 7590951 - Plug-in component-based dependency management for partitions within an incremental implementation flow (2009-09-15),
8. 7490312 - Partition-based incremental implementation flow for use with a programmable logic device (2009-02-10),
9. 7478357 - Versatile bus interface macro for dynamically reconfigurable designs (2009-01-13),
10. 7392498 - Method and apparatus for implementing a pre-implemented circuit design for a programmable logic device (2008-06-24),

Title: W Story Leavesley, III: Innovator in Programmable Integrated Circuits

Introduction

W Story Leavesley, III is a notable inventor based in Longmont, CO (US). He has made significant contributions to the field of programmable integrated circuits, holding a total of 10 patents. His work focuses on enhancing the efficiency and functionality of circuit designs.

Latest Patents

One of his latest patents is titled "Generating a module interface for partial reconfiguration design flows." This patent describes a method for processing a logical netlist to implement a circuit design within a programmable integrated circuit. The method involves identifying a dynamically reconfigurable module (DRM) that includes a port from the logical netlist. The DRM defines a reconfigurable region of the integrated circuit that communicates with a non-reconfigurable module via the port. The implementation includes locking routing resources and reusing them for the second circuitry of the DRM.

Another significant patent is "Verification of logic core implementation." This system and method provide a way to verify the implementation of a logic core in a complete bitstream. It involves extracting a logic core bitstream and comparing it to a reference bitstream for a target device. If no discrepancies are found, a data value is stored to indicate that the implementation is verified.

Career Highlights

W Story Leavesley, III is currently employed at Xilinx, Inc., a leading company in the field of programmable logic devices. His work at Xilinx has allowed him to push the boundaries of integrated circuit design and verification.

Collaborations

He has collaborated with notable coworkers such as Emil S Ochotta and William W Stiehl, contributing to various innovative projects within the company.

Conclusion

W Story Leavesley, III is a prominent figure in the realm of programmable integrated circuits, with a strong portfolio of patents that reflect his innovative spirit and technical expertise. His contributions continue to shape the future of circuit design and verification.

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