The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 2010

Filed:

Dec. 05, 2006
Applicants:

Brian J. Alexander, Erie, CO (US);

Jaime D. Lujan, Louisville, CO (US);

W. Story Leavesley, Iii, Longmont, CO (US);

Inventors:

Brian J. Alexander, Erie, CO (US);

Jaime D. Lujan, Louisville, CO (US);

W. Story Leavesley, III, Longmont, CO (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of managing correlation data for a design implementation process can include identifying correlation data from each of a plurality of design applications. Each of the design applications can generate a circuit description and the correlation data can specify associations between circuit elements of different ones of the circuit descriptions. The method also can include storing the circuit descriptions and the correlation data independently of one another and determining a relationship among circuit elements of the circuit descriptions according to the correlation data.


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Alexander, Brian. (2010). Design independent correlation data storage for use with physical design of programmable logic devices (U.S. Patent No. 7810055). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7810055

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