The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2008

Filed:

Nov. 19, 2004
Applicants:

Sankaranarayanan Srinivasan, Boulder, CO (US);

W. Story Leavesley, Iii, Longmont, CO (US);

George L. Mchugh, Berthoud, CO (US);

Douglas P. Wieland, Sunnyvale, CA (US);

Sandor S. Kalman, Iii, Santa Clara, CA (US);

Inventors:

Sankaranarayanan Srinivasan, Boulder, CO (US);

W. Story Leavesley, III, Longmont, CO (US);

George L. McHugh, Berthoud, CO (US);

Douglas P. Wieland, Sunnyvale, CA (US);

Sandor S. Kalman, III, Santa Clara, CA (US);

Assignee:

Xilinx, Inc, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method and apparatus for implementing a pre-implemented circuit design for a programmable logic device is described. In one example, a definition of the pre-implemented circuit design is obtained (). The definition includes a first physical implementation and a first logical implementation. A second logical implementation is produced () for an instance of the pre-implemented circuit design using the first logical implementation. A second physical implementation is produced () for then instance of the pre-implemented circuit design using the first physical implementation.


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