The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 2012
Filed:
Mar. 31, 2011
Jay T. Young, Louisville, CO (US);
W. Story Leavesley, Iii, Longmont, CO (US);
Jay T. Young, Louisville, CO (US);
W. Story Leavesley, III, Longmont, CO (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method of processing a logical netlist for implementing a circuit design within a programmable integrated circuit includes identifying a dynamically reconfigurable module (DRM) comprising a port from the logical netlist. The DRM defines a dynamically reconfigurable region of the integrated circuit that communicates with a module that is not dynamically reconfigurable via the port. First circuitry of the DRM and circuitry external to the DRM are implemented. The first circuitry connects to the circuitry external to the DRM via the port. The circuitry external to the DRM is within the module that is not dynamically reconfigurable. The method further includes locking routing resources connecting the circuitry external to the DRM to a location associated with a boundary of the DRM for the port; and implementing second circuitry of the DRM by reusing the locked routing resources. The second circuitry is routed to connect to the location associated with the boundary of the DRM for the port.