Umesh Chandra Srivastava

Title: Umesh Chandra Srivastava: Innovator in Digital Circuit Testing

Introduction

Umesh Chandra Srivastava is a notable inventor based in Greater Noida, India. He has made significant contributions to the field of digital circuit testing, holding a total of four patents. His innovative work focuses on improving the efficiency and effectiveness of scan coverage in digital circuits.

Latest Patents

One of Umesh's latest patents is titled "Area, cost, and time-effective scan coverage improvement." This invention involves a digital circuit that includes an OR gate and a flip-flop. The OR gate has a first input coupled to a control signal and a second input connected to uncovered functional combination logic of the digital circuit. The configuration allows for testing uncovered functional combination logic to detect defects effectively. Another significant patent is "Test pattern generation using multiple scan enables." This integrated circuit includes two sets of scan flip-flops and a controller designed to test logic elements by shifting test patterns and capturing results efficiently.

Career Highlights

Umesh Chandra Srivastava works at STMicroelectronics International N.V., a leading company in semiconductor solutions. His role involves developing innovative testing methods that enhance the reliability of digital circuits. His expertise in this area has positioned him as a valuable asset to his organization.

Collaborations

Umesh has collaborated with several talented individuals in his field, including Venkata Narayanan Srinivasan and Manish Sharma. These collaborations have fostered a creative environment that encourages innovation and the development of cutting-edge technologies.

Conclusion

Umesh Chandra Srivastava's contributions to digital circuit testing through his patents demonstrate his commitment to innovation and excellence in engineering. His work continues to influence the industry positively, paving the way for advancements in technology.