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For the Inventor, By the Inventor

Saratoga, CA, United States of America

Tsyr-Chyang Ho

This inventor holds 18 USPTO granted patents and 5 EPO patents, primarily in Data Communication Systems. Top assignees: Rambus Inc., Other. Active years: 1996-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tsyr-Chyang Ho. Retrieved from https://idiyas.com/inventor/tsyr-chyang-ho

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 18

% Patents Active = 44.4

 

Average Co-Inventor Count = 5.8

ph-index = 9

Forward Citations = 1,279(Granted Patents)


Location History:

  • San Jose, CA (US) (1996 - 2014)
  • Saratoga, CA (US) (2015 - 2019)

Company Filing History:

goldMedal17 out of 2,959 
 
Rambus Inc.
 patents
silverMedal1 out of 834,570 
Other
 patents

Years Active: 1996-2019

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Areas of Expertise:
Flash Memory Controller
Calibrated Data Communication
Memory System
Transmit Timing Offset
Reference Voltages
Integrated Circuit
Timing Adjustment
Phase Detector
Bus System Optimization
Slew Rate Adjustment
Delay-Locked Loop
Amplifier Correction
18 patents (USPTO):Explore Patents
1. 10310999 - Flash memory controller with calibrated data communication (2019-06-04),
2. 9785589 - Memory controller that calibrates a transmit timing offset (2017-10-10),
3. 9405678 - Flash memory controller with calibrated data communication (2016-08-02),
4. 9164933 - Memory system with calibrated data communication (2015-10-20),
5. 8948212 - Memory controller with circuitry to set memory device-specific reference voltages (2015-02-03),
6. 8630317 - Memory system with calibrated data communication (2014-01-14),
7. 8170067 - Memory system with calibrated data communication (2012-05-01),
8. 7535933 - Calibrated data communication system and method (2009-05-19),
9. 7042914 - Calibrated data communication system and method (2006-05-09),
10. 6950956 - Integrated circuit with timing adjustment mechanism and method (2005-09-27),
11. 6643787 - Bus system optimization (2003-11-04),
12. 6642746 - Phase detector with minimized phase detection error (2003-11-04),
13. 6480035 - Phase detector with minimized phase detection error (2002-11-12),
14. 6340900 - Phase detector with minimized phase detection error (2002-01-22),
15. 6047346 - System for adjusting slew rate on an output of a drive circuit by (2000-04-04),

Title: The Innovative Journey of Tsyr-Chyang Ho

Introduction: Tsyr-Chyang Ho, a distinguished inventor hailing from Saratoga, CA, has made significant contributions to the field of technology and innovation.

Latest Patents: Tsyr-Chyang Ho's latest patents focus on cutting-edge advancements in artificial intelligence and renewable energy technologies, showcasing his commitment to creating a sustainable future.

Career Highlights: With a career spanning over two decades, Tsyr-Chyang Ho has held key positions in renowned tech companies, leading groundbreaking projects that have revolutionized the industry.

Collaborations: Throughout his career, Tsyr-Chyang Ho has collaborated with top researchers, engineers, and scientists, fostering a culture of innovation and excellence in every project he undertakes.

Conclusion: Tsyr-Chyang Ho's relentless pursuit of innovation and his passion for pushing the boundaries of technology make him a true visionary in the world of inventions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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