The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 04, 2000
Filed:
Feb. 02, 1998
Applicant:
Inventors:
Benedict C Lau, San Jose, CA (US);
Jason Wei, Cupertino, CA (US);
Tsyr-Chyang Ho, San Jose, CA (US);
Samir A Patel, Los Altos, CA (US);
Yiu-Fai Chan, Los Altos Hills, CA (US);
Assignee:
Rambus Inc., Mountain View, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
710126 ; 327158 ; 327170 ; 327262 ; 361 18 ;
Abstract
An interface circuit providing a high speed bus. According to one embodiment, the interface circuitry includes a plurality of I/O pins coupled to a plurality of bus drivers, wherein each bus driver is configured to adjust the rise time, fall time, and drive strength of outputs signal on the I/O pins based on process-voltage-temperature ('PVT') conditions. The circuitry used to adjust the I/O outputs includes a slew rate control circuit, a current control circuit, and a delay lock loop ('DLL').