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Yamatokoriyama, Japan

Tsutomu Ashida

This inventor holds 8 USPTO granted patents. Top assignee: Sharp Kabushiki Kaisha Corporation. Active years: 1990-2007.

USPTO Granted Patents = 8

% Patents Active = 75.0

Average Co-Inventor Count = 1.4

ph-index = 5

Forward Citations = 77(Granted Patents)

Location History:

Nara, JP (1997)
Yamatokooriyama, JP (2002)
Yamatokoriyama, JP (1990 - 2007)

Company Filing History:

8 out of 25,939

Sharp Kabushiki Kaisha Corporation

Years Active: 1990-2007

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8 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7195948 - Method for fabricating semiconductor device (2007-03-27),

2. 6630717 - CMOS semiconductor circuit with reverse bias applied for reduced power consumption (2003-10-07),

3. 6351007 - Quantum thin line producing method and semiconductor device employing the quantum thin line (2002-02-26),

4. 6198137 - Semiconductor device (2001-03-06),

5. 5659202 - Semiconductor device with a pair of dummy electrodes below an inner lead (1997-08-19),

6. 5272671 - Semiconductor memory device with redundancy structure and process of (1993-12-21),

7. 4974042 - Semiconductor memory device with compact ROM memory cells (1990-11-27),

8. 4947232 - High voltage MOS transistor (1990-08-07),

Profile summary based on public USPTO records.

Please report any incorrect information to [email protected]

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