Toshifumi Suganaga

Title: Toshifumi Suganaga: Semiconductor Lithography Inventor

Introduction

Toshifumi Suganaga is an inventor based in Tokyo, Japan, whose work includes innovations in semiconductor lithography and exposure technology. He is associated with 7 patents.

Latest Patents

Suganaga’s listed patents address resist-pattern formation and the accurate control of exposure in semiconductor manufacturing.

“Method of Forming Resist Pattern and Method of Manufacturing Semiconductor Device” describes a process intended to improve optical proximity effect (OPE) characteristics caused by differences between sparse and dense mask patterns, while helping patterns more closely match their designs. The method forms a resist layer on a substrate, applies an acid-polymer upper layer, exposes the resist through a mask, performs a baking process, and develops the pattern with an alkali solution. During baking, the upper layer and resist form a mixing layer, which is thicker in unexposed areas of high-density mask regions than in corresponding areas of low-density regions.

“Exposure Apparatus, Exposure Method and Semiconductor Device Fabricated with the Exposure Method” concerns managing exposure accurately. The apparatus averages illuminance readings from four meters on a stage, then uses the resulting information to control light exposure. This approach is designed to support more reliable exposure management during semiconductor fabrication.

Career Highlights

Suganaga’s listed company affiliations include Mitsubishi Denki Kabushiki Kaisha, commonly known as Mitsubishi Electric, and Renesas Technology Corp. His patent work reflects a focus on lithography processes and exposure control, both important to the manufacture of semiconductor devices.

Collaborations

His listed coworkers include Eiichi Ishikawa and Takeo Ishibashi. Their shared professional context connects Suganaga’s work with broader efforts in semiconductor technology and manufacturing.

Conclusion

Toshifumi Suganaga’s patents address practical challenges in semiconductor lithography, from improving resist-pattern fidelity to controlling exposure more accurately.