logo

For the Inventor, By the Inventor

Higashiyamato, Japan

Tetsurou Matsumoto

This inventor holds 29 USPTO granted patents and 1 published patent application, primarily in Semiconductor Devices. Top assignees: Hitachi, Ltd., Hitachi Vlsi Engineering Corp., Hitachi Ulsi Systems Co., Ltd.. Active years: 1984-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tetsurou Matsumoto. Retrieved from https://idiyas.com/inventor/tetsurou-matsumoto

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 29 

% Patents Active = 79.3

Average Co-Inventor Count = 14.2

ph-index = 10

Forward Citations = 278(Granted Patents)


Location History:

  • Koganei, JP (1984)
  • Higashiyamato, JP (1992 - 2009)

Company Filing History:

goldMedal28 out of 42,740 
 
Hitachi, Ltd.
 patents
silverMedal7 out of 182 
 
Hitachi Vlsi Engineering Corp.
 patents
bronzeMedal3 out of 336 
 
Hitachi Ulsi Systems Co., Ltd.
 patents
4. 1 out of 4 
 
Vlsi Engineering Corporation
 patents
5. 1 out of 834,570 
Other
 patents
where one patent can have more than one assignee

Years Active: 1984-2009

Loading Chart...
Areas of Expertise:
Semiconductor Memory
Defect Remedy
Voltage Generating Circuit
Zigzag Bonding Pad
Dynamic Random Access
Bi-CMOS
Testing Method
Manufacturing Process
Layout Structure
MOS Memory Device
29 patents (USPTO):Explore Patents
1. 7499340 - Semiconductor memory device and defect remedying method thereof (2009-03-03),
2. 7345929 - Semiconductor memory device and defect remedying method thereof (2008-03-18),
3. 7203101 - Semiconductor memory device and defect remedying method thereof (2007-04-10),
4. 7016236 - Semiconductor memory device and defect remedying method thereof (2006-03-21),
5. 6898130 - Semiconductor memory device and defect remedying method thereof (2005-05-24),
6. 6657901 - Semiconductor device formed in a rectangle region on a semiconductor substrate including a voltage generating circuit (2003-12-02),
7. 6515913 - Semiconductor memory device and defect remedying method thereof (2003-02-04),
8. 6335884 - Semiconductor memory device and defect remedying method thereof (2002-01-01),
9. 6212089 - Semiconductor memory device and defect remedying method thereof (2001-04-03),
10. 6160744 - Semiconductor memory device and defect remedying method thereof (2000-12-12),
11. 6130114 - Semiconductor device (2000-10-10),
12. 6081023 - Semiconductor device (2000-06-27),
13. 6072231 - Semiconductor device (2000-06-06),
14. 6049500 - Semiconductor memory device and defect remedying method thereof (2000-04-11),
15. 6018191 - Semiconductor device (2000-01-25),

Title: Tetsurou Matsumoto - Innovative Inventor from Higashiyamato, Japan

Introduction: Tetsurou Matsumoto is a renowned inventor hailing from Higashiyamato, Japan, known for his groundbreaking contributions to various fields of technology and innovation.

Latest Patents: Matsumoto's latest patents include advancements in robotics, artificial intelligence, and sustainable energy solutions, showcasing his commitment to creating a more efficient and sustainable future.

Career Highlights: With over two decades of experience in the industry, Matsumoto has a proven track record of developing cutting-edge technologies that have revolutionized the way we live and work. His innovative spirit and dedication to excellence have earned him recognition as a pioneer in the field of invention.

Collaborations: Throughout his career, Matsumoto has collaborated with leading research institutions, universities, and tech companies to bring his ideas to life. His ability to work across disciplines and industries has led to the successful implementation of numerous groundbreaking projects.

Conclusion: Tetsurou Matsumoto's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and entrepreneurs. His contributions to the world of technology have left an indelible mark, shaping the future of innovation for years to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…