Tokyo, Japan

Takeshi Okazawa

This inventor holds 27 USPTO granted patents, primarily in Magnetic Memory Technology. Top assignees: Nec Corporation, Nec Electronics Corporation. Active years: 1986-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takeshi Okazawa. Retrieved from https://idiyas.com/inventor/takeshi-okazawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 88.9

Average Co-Inventor Count = 1.3

ph-index = 14

Forward Citations = 600(Granted Patents)


Location History:

  • Tokyo, JP (1986 - 2005)
  • Kanagawa, JP (2004 - 2008)

Company Filing History:


Years Active: 1986-2008

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Areas of Expertise:
Magnetic Memory
MRAM
Nonvolatile Storage
Data Writing
Memory Device
Fabrication Method
Tunnel Magnetoresistance
Semiconductor Device
Transistor Cells
Data Erasing
Memory Cell Array
Integrated Circuit
27 patents (USPTO):Explore Patents

Title: Innovations of Takeshi Okazawa: Pioneering Advances in Memory Technology

Introduction

Takeshi Okazawa, based in Tokyo, Japan, is an esteemed inventor with a remarkable portfolio of 27 patents, primarily in the field of memory technology. His groundbreaking work has contributed significantly to the advancement of semiconductor memory devices, reflecting his commitment to innovation and excellence.

Latest Patents

Okazawa's latest patents include notable inventions such as a "Magnetic memory device having XP cell and Str cell in one chip." This innovative semiconductor memory device comprises an XP type MRAM cell array and an STr type MRAM cell array integrated into a single chip. The layered structure allows the STr type MRAM cell array to function as a work memory area, while the XP type serves as the data storage area. The ability to connect cells from both arrays to the same bit-line facilitates efficient data writing.

Additionally, he has developed the patent titled "MRAM and data writing method therefor," which focuses on an MRAM system with main and sub-structures. This invention introduces a novel approach to data writing that utilizes a substrate current, rather than a channel current, through selecting transistors driving a snap back phenomenon. This method enhances the writing process by discharging the charge stored in the corresponding main and sub-word lines, ensuring greater efficiency in memory operations.

Career Highlights

Throughout his career, Okazawa has made significant contributions to leading technology companies, including NEC Corporation and NEC Electronics Corporation. His work at these organizations has positioned him as a key figure in memory technology innovation.

Collaborations

In his journey, Okazawa has collaborated with other notable professionals such as Hiroki Shirai and Taishi Kubota. Working alongside these talented individuals has fostered a creative environment that inspires further breakthroughs in the field of semiconductor memory.

Conclusion

Takeshi Okazawa's contributions to the memory technology sector reflect his ingenuity and determination as an inventor. With 27 patents to his name, his latest innovations continue to pave the way for advancements in semiconductor technology, ensuring that he remains at the forefront of innovation in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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