Ota, Japan

Takashi Noma

This inventor holds 103 USPTO granted patents and 15 published patent applications and 5 EPO patents, primarily in Semiconductor Packaging (CPC class H01L21-78). Top assignees: Semiconductor Components Industries, LLC, Sanyo Electric Co., Ltd., Murata Manufacturing Co., Ltd.. Active years: 2000-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takashi Noma. Retrieved from https://idiyas.com/inventor/takashi-noma

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 103 

% Patents Active = 91.3

 

Average Co-Inventor Count = 2.6

ph-index = 15

Forward Citations = 861(Granted Patents)

Forward Citations (Not Self Cited) = 774(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Ohta, JP (2006)
  • Shiga-ken, JP (2010 - 2011)
  • Moriyama, JP (2000 - 2012)
  • Gunma, JP (2002 - 2014)
  • Kyoto-fu, JP (2016)
  • Nagaokakyo, JP (2000 - 2021)
  • Ota, JP (2005 - 2024)

Company Filing History:


Years Active: 2000-2026

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Areas of Expertise:
Electrical Contacts
Multi-Chip System
Wafer Level Packaging
Substrate Alignment
Thinned Semiconductor
Backside Metal
Isolation
Solder Bump Formation
Integrated Passive Device
ESD Protection Device
Inductor Array Chip
Coil Antenna
103 patents (USPTO):Explore Patents

Title: Takashi Noma: Pioneering Innovator in Semiconductor Devices

Introduction:

Takashi Noma, a distinguished inventor based in Ota, Japan, has cemented his legacy as a trailblazer in the field of inventions. With an impressive portfolio of 93 patents, Noma's relentless pursuit of innovation and unwavering commitment to excellence have made him a revered figure in the world of technology.

Latest Patents:

1. Semiconductor device with backmetal and related methods: Noma's groundbreaking invention involves semiconductor devices with optimized die and metal layer thickness ratios, pushing the boundaries of efficiency and performance.

2. Integrated passive device and fabrication method using a last through-substrate via: This patent showcases Noma's expertise in creating integrated passive devices with through-substrate vias, enabling seamless interconnect access to passive components.

Career Highlights:

Noma has made significant contributions while working at renowned companies such as Sanyo Electric Co., Ltd. and Murata Manufacturing Co., Ltd. His innovative spirit and technical prowess have propelled the development of cutting-edge technologies in the semiconductor industry.

Collaborations:

Throughout his career, Noma has collaborated with esteemed colleagues such as Hiroyuki Shinogi and Shinzo Ishibe. Together, they have shared knowledge, expertise, and a passion for pushing the boundaries of what is possible in the world of inventions.

Conclusion:

Takashi Noma's dedication to innovation and his exceptional contributions to the field of semiconductor devices have laid the foundation for future generations of inventors. His pioneering work continues to inspire creativity, pushing the boundaries of technological advancements and shaping the landscape of the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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