Tadashi Mitsui

This inventor holds 23 USPTO granted patents, primarily in Semiconductor Manufacturing. Top assignee: Kabushiki Kaisha Toshiba. Active years: 2006-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tadashi Mitsui. Retrieved from https://idiyas.com/inventor/tadashi-mitsui

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 23

% Patents Active = 26.1

Average Co-Inventor Count = 1.1

ph-index = 4

Forward Citations = 42(Granted Patents)

Location History:

Kanagawa, JP (2006 - 2009)
Kamakura, JP (2006 - 2015)

Company Filing History:

23 out of 53,262

Kabushiki Kaisha Toshiba

patents

Years Active: 2006-2015

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Areas of Expertise:

Pattern Inspection

Defect Detection

Image Processing

Semiconductor Device

Measurement System

Pattern Evaluation

Alignment Methods

Edge Detection

Pattern Matching

Manufacturing Methods

Computer-Readable Medium

Data Processing

23 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9153419 - Pattern defect inspection using data based on secondary electron from pattern (2015-10-06),

2. 8532395 - Pattern inspection method and semiconductor device manufacturing method (2013-09-10),

3. 8355560 - Pattern evaluation system, pattern evaluation method and semiconductor device manufacturing method (2013-01-15),

4. 8290242 - Defect inspection apparatus and defect inspection method (2012-10-16),

5. 8160349 - Pattern shape evaluation method, program, and semiconductor device manufacturing method (2012-04-17),

6. 8150177 - Image processing apparatus, image processing method, defect detection method, semiconductor device manufacturing method, and program (2012-04-03),

7. 8144969 - Pattern evaluation method, computer-readable recording medium, and manufacturing method of semiconductor device (2012-03-27),

8. 8144338 - Pattern measurement apparatus and pattern measurement method (2012-03-27),

9. 8126257 - Alignment of semiconductor wafer patterns by corresponding edge groups (2012-02-28),

10. 8090192 - Pattern misalignment measurement method, program, and semiconductor device manufacturing method (2012-01-03),

11. 8086041 - Pattern evaluation method, pattern matching method and computer readable medium (2011-12-27),

12. 8045807 - Pattern edge detecting method and pattern evaluating method (2011-10-25),

13. 8041105 - Pattern evaluation method, computer-readable medium, and semiconductor device manufacturing method (2011-10-18),

14. 8036445 - Pattern matching method, program and semiconductor device manufacturing method (2011-10-11),

15. 8019165 - Image processing apparatus, image processing method, defect detection method, semiconductor device manufacturing method, and program (2011-09-13),

Title: Innovations by Tadashi Mitsui: A Leader in Semiconductor Pattern Inspection

Introduction

Tadashi Mitsui, an innovative inventor based in Kamakura, Japan, has made significant contributions to the field of semiconductor manufacturing. With an impressive portfolio of 23 patents, he specializes in advanced pattern inspection methods that enhance accuracy and efficiency in the production process.

Latest Patents

Mitsui's recent patents focus on cutting-edge techniques for pattern defect inspection. One of his prominent patents describes a method that involves generating electron beam irradiation point track data based on the first data from an inspection target pattern. This method utilizes electron beam irradiation to detect secondary electrons and subsequently identifies defects within the pattern. By acquiring signal intensity data from secondary electrons, this innovative approach enables the precise detection of abnormalities within semiconductor patterns.

Another significant patent outlines a pattern inspection method and a semiconductor device manufacturing method. This includes predicting edge shapes for the inspection target pattern and setting specific thresholds for quality specifications. The method incorporates imaging at different time intervals to detect edge shapes and generate a difference vector, allowing for improved forecasting of potential failures before they occur.

Career Highlights

Tadashi Mitsui is currently employed at Kabushiki Kaisha Toshiba, a leading company in the technology sector known for its contributions to electronics and semiconductors. Mitsui’s work has significantly advanced the capabilities of pattern inspections in semiconductor manufacturing, demonstrating his expertise and commitment to innovation in the industry.

Collaborations

Throughout his career, Mitsui has collaborated with talented professionals including Yumiko Miyano and Atsushi Onishi. Together, these innovators have shared insights and skills to foster advancements in their respective fields, further enhancing the research and development capabilities at Toshiba.

Conclusion

Tadashi Mitsui’s innovative methods and patents have established him as a key figure in the semiconductor industry. His contributions to pattern inspection serve not only to address current manufacturing challenges but also pave the way for future innovations in the field. With a continuous drive for improvement and collaboration, Mitsui remains a pivotal inventor in the technological landscape.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]