Saint Pierre d'Allevard, France

Sylvain Majcherczak

This inventor holds 4 USPTO granted patents and 1 published patent application. Top assignees: STMicroelectronics, Commissariat a L'energie Atomique Et Aux Energies Alternatives. Active years: 2003-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sylvain Majcherczak. Retrieved from https://idiyas.com/inventor/sylvain-majcherczak

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4 

% Patents Active = 25.0

Average Co-Inventor Count = 1.8

ph-index = 1

Forward Citations = 7(Granted Patents)


Location History:

  • St. Martin d'Heres, FR (2003)
  • Saint Pierre D'Allevard, FR (2011)
  • St. Pierre D'Allevard, FR (2014 - 2015)

Company Filing History:


Years Active: 2003-2015

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4 patents (USPTO):Explore Patents

Title: Sylvain Majcherczak: Innovator in Integrated Circuit Technology

Introduction

Sylvain Majcherczak is a notable inventor based in St. Pierre d'Allevard, France. He has made significant contributions to the field of integrated circuits, holding a total of 4 patents. His work focuses on enhancing the functionality and efficiency of digital output ports in integrated circuits.

Latest Patents

One of his latest patents is titled "Integrated circuit comprising at least one digital output port having an adjustable impedance, and corresponding adjustment method." This invention involves an integrated circuit that includes a digital output port with a buffer stage made up of MOSFET transistors. The design features pull-up transistors connected to a high voltage and pull-down transistors linked to a low voltage, all formed within a thin semiconductor layer of an FDSOI substrate. This innovative approach allows for the adjustment of the threshold voltage of the transistors, enhancing the circuit's performance.

Another significant patent is "Output stage formed inside and on top of an SOI-type substrate." This method controls an output amplification stage using complementary SOI-type power MOS transistors. The process involves connecting the bulk of each transistor to the respective power supply rails when in an off state, ensuring efficient operation during switching.

Career Highlights

Throughout his career, Sylvain has worked with prominent companies such as STMicroelectronics and the Commissariat à l'Énergie Atomique et aux Énergies Alternatives. His experience in these organizations has allowed him to develop and refine his innovative ideas in integrated circuit technology.

Collaborations

Sylvain has collaborated with notable colleagues, including Dimitri Soussan and Guy Mabboux. Their teamwork has contributed to advancements in the field and has fostered a collaborative environment for innovation.

Conclusion

Sylvain Majcherczak's contributions to integrated circuit technology demonstrate his expertise and commitment to innovation. His patents reflect a deep understanding of electronic design and a drive to improve circuit performance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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