Iwama, Japan

Sueo Kawai

This inventor holds 39 USPTO granted patents, primarily in Semiconductor Devices. Top assignees: Hitachi, Ltd., Hitachi Microcomputer System, Ltd., Renesas Technology Corp.. Active years: 1982-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sueo Kawai. Retrieved from https://idiyas.com/inventor/sueo-kawai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 92.3

Average Co-Inventor Count = 11.9

ph-index = 15

Forward Citations = 639(Granted Patents)


Location History:

  • Kudamatsu, JP (1987)
  • Nishiibaraki, JP (1991)
  • Ibaragi, JP (1991)
  • Ibaraki, JP (1982 - 1995)
  • Ibaraki-ken, JP (1998)
  • Iwama-machi, Nishiibaragi-gun, Ibaragi, JP (2003)
  • Iwama, JP (1991 - 2005)
  • Iwama-machi, JP (1997 - 2012)

Company Filing History:


Years Active: 1982-2012

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Areas of Expertise:
Leadframe
Integrated Circuit
Semiconductor Device
Manufacturing Process
Resin Sealing
Chip Pad Structure
Heat Transfer Cap
Superconducting Magnet
Transportation Apparatus
Rotary Electric Machine
39 patents (USPTO):Explore Patents

Title: **Innovative Contributions of Sueo Kawai in Semiconductor Technology**

Introduction

Sueo Kawai, a prominent inventor located in Iwama-machi, Japan, has made significant contributions in the field of semiconductor technology, holding a remarkable total of 39 patents. His innovative approach to semiconductor packaging has led to advancements that enhance the performance and reliability of integrated circuit devices.

Latest Patents

Kawai's latest patents include innovations for leadframe semiconductor integrated circuit devices and methods for fabricating them. His approach aims to improve package body cracking resistance during reflow soldering processes. Kawai's design involves modifying the die pad's external dimensions to increase the adhesion area between the semiconductor chip and resin, allowing for the mounting of a variety of semiconductor chips with differing sizes. Moreover, his work addresses the challenges posed by large-sized and highly integrated semiconductor chips by utilizing a unique package structure, often referred to as 'Lead-On-Chip' or 'Chip-On-Lead.' This design improves signal transmission rates and reduces electrical noise by optimizing the gap between the semiconductor chip and the inner leads.

Career Highlights

Throughout his career, Kawai has been affiliated with notable companies such as Hitachi, Ltd. and Hitachi Microcomputer System, Ltd. His tenure at these organizations has allowed him to push the boundaries of semiconductor device technology, solidifying his reputation as an innovator in the field.

Collaborations

Kawai's inventive journey includes collaborations with esteemed colleagues, including Akihiro Yaguchi and Asao Nishimura. Together, they have collectively contributed to advancing semiconductor technologies and enhancing the capabilities of integrated circuits.

Conclusion

Sueo Kawai continues to be a pioneering force in semiconductor innovation. His 39 patents serve as testimonials of his commitment to improving technology that underpins modern electronics. As the demand for more efficient and reliable semiconductor devices grows, Kawai's contributions remain critical in shaping the future of this vital industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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