The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 04, 2012
Filed:
Nov. 15, 2001
Yujiro Kajihara, Hachiouji, JP;
Kazunari Suzuki, Tokyo, JP;
Kunihiro Tsubosaki, Hino, JP;
Hiromichi Suzuki, Tokyo, JP;
Yoshinori Miyaki, Tachikawa, JP;
Takahiro Naito, Kodaira, JP;
Sueo Kawai, Iwama-machi, JP;
Yujiro Kajihara, Hachiouji, JP;
Kazunari Suzuki, Tokyo, JP;
Kunihiro Tsubosaki, Hino, JP;
Hiromichi Suzuki, Tokyo, JP;
Yoshinori Miyaki, Tachikawa, JP;
Takahiro Naito, Kodaira, JP;
Sueo Kawai, Iwama-machi, JP;
Renesas Electronics Corporation, Kanagawa, JP;
Hitachi ULSI Systems Co., Ltd., Tokyo, JP;
Abstract
In order to improve the package body cracking resistance of an LSI package at the reflow soldering and to provide both a leadframe suitable for fabricating the LSI package according to the flexible manufacturing system and an LSI using the leadframe, the adhered area between a semiconductor chipand a resin is enlarged by making the external size of a die padsmaller than that of the semiconductor chip to be mounted thereon. Moreover, a variety of semiconductor chipshaving different external sizes can be mounted on the die padby cutting the leading ends of leadsto a suitable length in accordance with the external sizes of the semiconductor chips