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For the Inventor, By the Inventor

Saratoga, CA, United States of America

Steve S Chiang

This inventor holds 46 USPTO granted patents, primarily in Micro-Electromechanical Devices. Top assignees: Actel Corporation, Inc., Prolinx Labs Corporation, Texas Instruments Corporation. Active years: 1990-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Steve S Chiang. Retrieved from https://idiyas.com/inventor/steve-s-chiang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 46

% Patents Active = 97.8

Average Co-Inventor Count = 3.3

ph-index = 24

Forward Citations = 1,770(Granted Patents)


Company Filing History:

goldMedal21 out of 463 
 
Actel Corporation, Inc.
 patents
silverMedal14 out of 14 
 
Prolinx Labs Corporation
 patents
bronzeMedal8 out of 29,922 
 
Texas Instruments Corporation
 patents
4. 2 out of 93 
 
Reflectivity, Inc.
 patents
5. 1 out of 834,601 
Other
 patents

Years Active: 1990-2010

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Areas of Expertise:
Micro-Electromechanical Devices
Antifuse Structure
VLSI Application
Ball Grid Array
Programmable Circuit Board
ESD Protection
Reconfigurable Interconnect
Conductive Particles
Integrated Circuits
Electronic Components
Trace Interconnection
Low-Impedance Elements
46 patents (USPTO):Explore Patents
1. 7671428 - Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates (2010-03-02),
2. 7655492 - Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates (2010-02-02),
3. 7586668 - Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates (2009-09-08),
4. 7573111 - Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates (2009-08-11),
5. 7449358 - Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates (2008-11-11),
6. 7307775 - Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates (2007-12-11),
7. 7286278 - Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates (2007-10-23),
8. 7198982 - Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates (2007-04-03),
9. 6995040 - Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates (2006-02-07),
10. 6995034 - Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates (2006-02-07),
11. 6603187 - Antifuse structure suitable for VLSI application (2003-08-05),
12. 6111302 - Antifuse structure suitable for VLSI application (2000-08-29),
13. 6034427 - Ball grid array structure and method for packaging an integrated circuit (2000-03-07),
14. 5987744 - Method for supporting one or more electronic components (1999-11-23),
15. 5962815 - Antifuse interconnect between two conducting layers of a printed circuit (1999-10-05),

Title: Steve S Chiang - Innovator from Saratoga, CA

Introduction: Steve S Chiang is a renowned inventor based in Saratoga, CA, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Steve S Chiang holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his expertise in cutting-edge technologies.

Career Highlights: With a career spanning over two decades, Steve has worked with top tech companies, leading research institutions, and universities, where he has spearheaded projects that have revolutionized the industry.

Collaborations: Throughout his career, Steve has collaborated with fellow inventors, patent attorneys, and industry experts to bring his ideas to life, resulting in successful products and solutions that have had a significant impact on the market.

Conclusion: Steve S Chiang's passion for innovation and his relentless drive to push the boundaries of technology make him a standout figure in the world of inventors and innovators.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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