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For the Inventor, By the Inventor

Los Altos Hills, CA, United States of America

Sohrab Kianian

This inventor holds 18 USPTO granted patents and 2 published patent applications. Top assignee: Silicon Storage Technology, Inc.. Active years: 1998-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sohrab Kianian. Retrieved from https://idiyas.com/inventor/sohrab-kianian

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 18 

% Patents Active = 94.4

Average Co-Inventor Count = 1.9

ph-index = 8

Forward Citations = 269(Granted Patents)


Location History:

  • Los Altos, CA (US) (1998 - 2009)
  • Los Altos Hills, CA (US) (2005 - 2009)

Company Filing History:

goldMedal18 out of 655 
 
Silicon Storage Technology, Inc.
 patents

Years Active: 1998-2009

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18 patents (USPTO):Explore Patents
1. 7547603 - Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same (2009-06-16),
2. 7537996 - Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried source line and floating gate (2009-05-26),
3. 7533063 - Smart memory card wallet (2009-05-12),
4. 7411246 - Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby (2008-08-12),
5. 7326614 - Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby (2008-02-05),
6. 7307308 - Buried bit line non-volatile floating gate memory cell with independent controllable control gate in a trench, and array thereof, and method of formation (2007-12-11),
7. 7205198 - Method of making a bi-directional read/program non-volatile floating gate memory cell (2007-04-17),
8. 7190018 - Bi-directional read/program non-volatile floating gate memory cell with independent controllable control gates, and array thereof, and method of formation (2007-03-13),
9. 7144778 - Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line (2006-12-05),
10. 7129536 - Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same (2006-10-31),
11. 7074672 - Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor (2006-07-11),
12. 6952034 - Semiconductor memory array of floating gate memory cells with buried source line and floating gate (2005-10-04),
13. 6952033 - Semiconductor memory array of floating gate memory cells with buried bit-line and raised source line (2005-10-04),
14. 6940125 - Vertical NROM and methods for making thereof (2005-09-06),
15. 6917069 - Semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor (2005-07-12),

Title: Top Inventor in Los Altos Hills, California

Introduction: Frederick Abbott Ware is a prominent inventor known for his significant contributions to various fields.

Latest Patents: His recent patents showcase innovative solutions and advancements in technology.

Career Highlights: Throughout his career, Ware has achieved numerous accolades and recognition for his work.

Collaborations: He has collaborated with various organizations and individuals to further his inventions.

Conclusion: Frederick Abbott Ware continues to be a leading figure in the world of innovation and invention.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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