Folsom, CA, United States of America

Shubra Marwaha

This inventor holds 18 USPTO granted patents and 12 published patent applications and 2 EPO patents, primarily in Graphics Processing Units. Top assignee: Intel Corporation. Active years: 2021-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shubra Marwaha. Retrieved from https://idiyas.com/inventor/shubra-marwaha

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 18 

% Patents Active = 100.0

 

Average Co-Inventor Count = 8.2

ph-index = 4

Forward Citations = 81(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2021 - 2024)
  • Folsom, CA (US) (2021 - 2024)

Company Filing History:


Years Active: 2021-2026

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Areas of Expertise:
Graphics Processors
Floating Point Format
Sparse Matrix Multiplication
Systolic Arrays
Dot Product Accumulate
Matrix Multiply Acceleration
Register File Usage
Feedback Inputs
Processing Resources
Multiplier Mechanism
Structured Sparsity
18 patents (USPTO):Explore Patents

Title: Inventor Shubra Marwaha: Pioneering Innovations in Matrix Multiplication Acceleration

Introduction

Shubra Marwaha, based in Folsom, California, is a prominent inventor recognized for her contributions to the field of graphics processing and matrix multiplication acceleration. With a remarkable portfolio of 14 patents, she stands out as a leading figure in technological advancements.

Latest Patents

Among her latest innovations is a patent titled "Scalable Sparse Matrix Multiply Acceleration Using Systolic Arrays with Feedback Inputs." This technology describes a sophisticated graphics processor architecture that incorporates a multitude of processing clusters, each consisting of various multiprocessors interconnected via a data interconnect. The design focuses on enhancing efficiency by integrating sparse matrix multiply acceleration hardware, which utilizes a systolic processing array and feedback inputs for optimal performance.

Another noteworthy patent is the "Sparse Matrix Multiplication Acceleration Mechanism." This apparatus is designed to facilitate faster matrix multiplication operations by incorporating a systolic array equipped with specialized hardware that performs multiply-add operations. It intelligently detects zero values within the matrix data, thereby optimizing the calculations and significantly reducing the number of operations required by the matrix multiplication hardware.

Career Highlights

Shubra Marwaha has made significant strides in her career at Intel Corporation, where she applies her innovative thinking to advance computing technologies. Her work is pivotal in enhancing the performance and efficiency of complex mathematical computations that are foundational in various applications, including machine learning and data analysis.

Collaborations

Throughout her career, Shubra has collaborated with esteemed colleagues such as Ashutosh Garg and Subramaniam M Maiyuran. These partnerships have enabled her to tackle challenging problems in her field and contribute to groundbreaking solutions that reflect a deep understanding of both hardware and software interactions.

Conclusion

Shubra Marwaha's contributions to the realm of graphics processing and matrix multiplication acceleration underline her status as a leading innovator. With her extensive patent portfolio and collaborative efforts, she continues to inspire and drive advancements in technology. As she moves forward in her career, her work promises to have lasting impacts on the industry and beyond.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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