Tempe, AZ, United States of America

Sarita Maini


 

Average Co-Inventor Count = 11.5

ph-index = 2

Forward Citations = 9(Granted Patents)


Location History:

  • Tempe, AZ (US) (2023)
  • Santa Clara, CA (US) (2023)

Company Filing History:


Years Active: 2023-2025

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5 patents (USPTO):

Title: The Innovative Contributions of Sarita Maini

Introduction

Sarita Maini is a prominent inventor based in Tempe, Arizona. She has made significant contributions to the field of multi-core computing environments, holding a total of five patents. Her work focuses on enhancing the efficiency and performance of processors through innovative methods and systems.

Latest Patents

One of Sarita Maini's latest patents is titled "Dynamic load balancing for multi-core computing environments." This patent discloses methods, apparatus, systems, and articles of manufacture designed for dynamic load balancing. The invention includes a processor with multiple cores and circuitry that manages data packets to optimize throughput. Another notable patent is "Hardware queue scheduling for multi-core computing environments." This invention outlines a system for hardware queue scheduling that assigns identifiers to data packets, allowing for efficient processing across multiple cores.

Career Highlights

Sarita Maini is currently employed at Intel Corporation, where she continues to innovate in the field of computing technology. Her work has been instrumental in advancing multi-core processing capabilities, making significant strides in how data is managed and processed in modern computing environments.

Collaborations

Throughout her career, Sarita has collaborated with notable colleagues, including Stephen T Palermo and Abhishek Khade. These collaborations have contributed to the development of her innovative patents and have fostered a dynamic environment for technological advancement.

Conclusion

Sarita Maini's contributions to multi-core computing are noteworthy and reflect her dedication to innovation. Her patents not only enhance processor performance but also pave the way for future advancements in computing technology.

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