The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 2025
Filed:
Sep. 11, 2020
Intel Corporation, Santa Clara, CA (US);
Niall McDonnell, Limerick, IE;
Gage Eads, Austin, TX (US);
Mrittika Ganguli, Tempe, AZ (US);
Chetan Hiremath, Portland, OR (US);
John Mangan, Shannon, IE;
Stephen Palermo, Chandler, AZ (US);
Bruce Richardson, Shannon, IE;
Edwin Verplanke, Chandler, AZ (US);
Praveen Mosur, Gilbert, AZ (US);
Bradley Chaddick, Portland, OR (US);
Abhishek Khade, Chandler, AZ (US);
Abhirupa Layek, Chandler, AZ (US);
Sarita Maini, Tempe, AZ (US);
Rahul Shah, Chandler, AZ (US);
Shrikant Shah, Chandler, AZ (US);
William Burroughs, Macungie, PA (US);
David Sonnier, Austin, TX (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Methods, apparatus, systems, and articles of manufacture are disclosed for hardware queue scheduling for multi-core computing environments. An example apparatus includes a first core and a second core of a processor, and circuitry in a die of the processor, at least one of the first core or the second core included in the die, the at least one of the first core or the second core separate from the circuitry, the circuitry to enqueue an identifier to a queue implemented with the circuitry, the identifier associated with a data packet, assign the identifier in the queue to a first core of the processor, and in response to an execution of an operation on the data packet with the first core, provide the identifier to the second core to cause the second core to distribute the data packet.