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For the Inventor, By the Inventor

Portland, OR, United States of America

Sarah E Kim

This inventor holds 43 USPTO granted patents, primarily in 3D Integrated Circuits. Top assignee: Intel Corporation. Active years: 2003-2013.

USPTO Granted Patents = 43

% Patents Active = 34.9

Average Co-Inventor Count = 3.3

ph-index = 17

Forward Citations = 4,098(Granted Patents)


Company Filing History:

goldMedal43 out of 56,184 
 
Intel Corporation
 patents

Years Active: 2003-2013

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Areas of Expertise:
Three-Dimensional Stacked Substrate
Electroosmotic Pumps
Cooling Micro-Channels
Thermoelectric Elements
Integrated Circuit Chips
Nanostructures
Wafer Bonding
Capacitance Device
Dielectric Recess
Vertical Stacking
Microelectronic Assembly
Copper Bonding
43 patents (USPTO):Explore Patents
1. 8421225 - Three-dimensional stacked substrate arrangements (2013-04-16),
2. 8203208 - Three-dimensional stacked substrate arrangements (2012-06-19),
3. 7973407 - Three-dimensional stacked substrate arrangements (2011-07-05),
4. 7842553 - Cooling micro-channels (2010-11-30),
5. 7723208 - Integrated re-combiner for electroosmotic pumps using porous frits (2010-05-25),
6. 7696015 - Method of forming a stack of heat generating integrated circuit chips with intervening cooling integrated circuit chips (2010-04-13),
7. 7615462 - Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack (2009-11-10),
8. 7576432 - Using external radiators with electroosmotic pumps for cooling integrated circuits (2009-08-18),
9. 7537954 - Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same (2009-05-26),
10. 7348217 - Method and structure for interfacing electronic devices (2008-03-25),
11. 7274106 - Packaged electroosmotic pumps using porous frits for cooling integrated circuits (2007-09-25),
12. 7271434 - Capacitor with insulating nanostructure (2007-09-18),
13. 7265406 - Capacitor with conducting nanostructure (2007-09-04),
14. 7244983 - Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode (2007-07-17),
15. 7227257 - Cooling micro-channels (2007-06-05),

Title: Innovative Contributions of Sarah E. Kim in the Field of Technology

Introduction: Sarah E. Kim, based in Portland, OR, is a remarkable inventor known for her groundbreaking work in technology, particularly in the realm of three-dimensional substrate arrangements. With an impressive portfolio of 43 patents, she has made significant contributions to her field, pushing the boundaries of innovation and setting new standards in technology development.

Latest Patents: Among her latest patents, Sarah has developed the innovative "Three-dimensional stacked substrate arrangements with reliable bonding and inter-substrate protection." This invention showcases her expertise in creating advanced structures that optimize functionality while ensuring durability and reliability in various applications.

Career Highlights: Sarah E. Kim's career has been marked by her tenure at Intel Corporation, where she has played a pivotal role in advancing semiconductor technology. Her continuous quest for innovation has led to numerous patents that enhance the efficiency and performance of technology products.

Collaborations: Sarah collaborates with esteemed colleagues, including R Scott List and Scot A Kellar, further enriching her innovative projects. Working alongside these talented individuals allows her to integrate diverse ideas and expertise, resulting in groundbreaking technological advancements.

Conclusion: Sarah E. Kim stands out as a leading inventor in her field, exemplifying the spirit of innovation that drives technological progress. Her numerous patents and collaborations underline her contributions to the industry and highlight her influence on the future of technology.

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