logo

For the Inventor, By the Inventor

Santa Clara, CA, United States of America

Ruibing Lu

USPTO Granted Patents = 10 

 

Average Co-Inventor Count = 3.1

ph-index = 4

Forward Citations = 34(Granted Patents)


Company Filing History:

goldMedal10 out of 5,008 
 
Xilinx, Inc.
 patents

Years Active: 2015-2020

Loading Chart...
Loading Chart...
10 patents (USPTO):Explore Patents
1. 10839125 - Post-placement and post-routing physical synthesis for multi-die integrated circuits (2020-11-17),
2. 10699053 - Timing optimization of memory blocks in a programmable IC (2020-06-30),
3. 10565334 - Targeted delay optimization through programmable clock delays (2020-02-18),
4. 9965581 - Fanout optimization to facilitate timing improvement in circuit designs (2018-05-08),
5. 9767247 - Look-up table restructuring for timing closure in circuit designs (2017-09-19),
6. 9646126 - Post-routing structural netlist optimization for circuit designs (2017-05-09),
7. 9613173 - Interactive multi-step physical synthesis (2017-04-04),
8. 9483597 - Opportunistic candidate path selection during physical optimization of a circuit design for an IC (2016-11-01),
9. 9235660 - Selective addition of clock buffers to a circuit design (2016-01-12),
10. 8984462 - Physical optimization for timing closure for an integrated circuit (2015-03-17),

Title: The Innovations of Ruibing Lu

Introduction

Ruibing Lu is a prominent inventor based in Santa Clara, CA (US). He has made significant contributions to the field of integrated circuits, holding a total of 10 patents. His work focuses on optimizing the design and functionality of multi-die integrated circuits, which are essential in modern electronic devices.

Latest Patents

One of Ruibing Lu's latest patents is titled "Post-placement and post-routing physical synthesis for multi-die integrated circuits." This patent describes methods, systems, and apparatus for performing physical synthesis optimizations after routing and placement. The process involves receiving a circuit design for a multi-die integrated circuit device, selecting a first driver on the first die, and modifying the circuit design to enhance performance by reducing distances between components.

Another notable patent is "Timing optimization of memory blocks in a programmable IC." This invention provides methods and apparatus for implementing a circuit design that includes a memory block. It involves generating a physical description corresponding to a predefined layout, executing timing analysis, and optimizing the physical description to improve timing profiles.

Career Highlights

Ruibing Lu is currently employed at Xilinx, Inc., a leading company in the field of programmable logic devices. His work at Xilinx has allowed him to push the boundaries of integrated circuit design and optimization. His innovative approaches have contributed to advancements in the efficiency and performance of electronic systems.

Collaborations

Throughout his career, Ruibing Lu has collaborated with notable colleagues, including Sabyasachi Das and Zhiyong Wang. These collaborations have fostered a creative environment that encourages the development of cutting-edge technologies in the field of integrated circuits.

Conclusion

Ruibing Lu's contributions to the field of integrated circuits through his patents and work at Xilinx, Inc. highlight his role as a key innovator in the industry. His dedication to optimizing circuit design continues to influence the future of electronic technology.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…