The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2018
Filed:
Jul. 20, 2015
Xilinx, Inc., San Jose, CA (US);
Sabyasachi Das, San Jose, CA (US);
Aaron Ng, Santa Clara, CA (US);
Ruibing Lu, Santa Clara, CA (US);
Niyati Shah, San Jose, CA (US);
Zhiyong Wang, Cupertino, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
A method of circuit design may include synthesizing a circuit design using a processor and, for the synthesized circuit design, selectively reducing, using the processor, fanout of nets having a number of loads exceeding a first threshold number of loads and having a selected netlist connectivity. The method may include placing the circuit design using a processor and, for the placed circuit design, selectively reducing, using the processor, fanout of nets according to at least one of a number of loads or criticality.