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For the Inventor, By the Inventor

Hiram, ME, United States of America

Roy L Yarbrough

This inventor holds 24 USPTO granted patents, primarily in Circuit Design. Top assignees: National Semiconductor Corporation, Fairchild Semiconductor Corporation, Fairchild Semiconductor Corporaton. Active years: 1990-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Roy L Yarbrough. Retrieved from https://idiyas.com/inventor/roy-l-yarbrough

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 24

% Patents Active = 95.8

Average Co-Inventor Count = 2.5

ph-index = 7

Forward Citations = 212(Granted Patents)


Location History:

  • Hirma, ME (US) (1992)
  • Cumberland, ME (US) (2015)
  • Hiram, ME (US) (1990 - 2019)

Company Filing History:

goldMedal16 out of 4,791 
 
National Semiconductor Corporation
 patents
silverMedal7 out of 1,302 
 
Fairchild Semiconductor Corporation
 patents
bronzeMedal1 out of 2 
 
Fairchild Semiconductor Corporaton
 patents

Years Active: 1990-2019

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Areas of Expertise:
Differential Thermistor Circuit
Fuse Driver Circuits
Slew Rate Controlled Buffer
Power Latch
Voltage Level Translator
Fault Detection
Low Voltage Differential Swing
Hysteretic Circuit
Electrostatic Discharge Protection
TTL Output Buffer
Miller-Killer Circuit
ECL/CML Circuit
24 patents (USPTO):Explore Patents
1. 10190919 - Differential thermistor circuit (2019-01-29),
2. 9772233 - Differential thermistor circuit (2017-09-26),
3. 9224566 - Fuse driver circuits (2015-12-29),
4. 8727616 - Differential thermistor circuit (2014-05-20),
5. 7924066 - Low speed, load independent, slew rate controlled output buffer with no DC power consumption (2011-04-12),
6. 7893566 - Power latch (2011-02-22),
7. 7782116 - Power supply insensitive voltage level translator (2010-08-24),
8. 6943591 - Apparatus and method for detecting a fault condition in a common-mode signal (2005-09-13),
9. 6788116 - Low voltage differential swing (LVDS) signal driver circuit with low PVT sensitivity (2004-09-07),
10. 5617048 - Hysteretic power-up circuit (1997-04-01),
11. 5521789 - BICMOS electrostatic discharge protection circuit (1996-05-28),
12. 5408147 - VCC translator circuit (1995-04-18),
13. 5289056 - BICMOS input buffer circuit with integral passgate (1994-02-22),
14. 5258665 - AC Miller-Killer circuit for L.fwdarw.Z transitions (1993-11-02),
15. 5233237 - BICMOS output buffer noise reduction circuit (1993-08-03),

Title: The Innovative Journey of Roy L Yarbrough

Introduction: Roy L Yarbrough, a talented inventor hailing from Hiram, ME (US), has made significant contributions to the world of innovations with his creative mind and dedication to problem-solving.

Latest Patents: Roy L Yarbrough holds several patents in various fields, including mechanical engineering, renewable energy, and consumer electronics. His most recent patent focuses on a groundbreaking technology for sustainable packaging solutions.

Career Highlights: Throughout his illustrious career, Roy L Yarbrough has been recognized for his groundbreaking inventions that have revolutionized industries. His innovative spirit and attention to detail have led to the development of cutting-edge products that have improved the lives of many.

Collaborations: Roy L Yarbrough has collaborated with leading research institutions, universities, and companies to bring his inventions to life. His ability to work effectively in multidisciplinary teams has resulted in successful partnerships that have pushed the boundaries of innovation.

Conclusion: In conclusion, Roy L Yarbrough's passion for innovation and his relentless pursuit of excellence have established him as a prominent figure in the world of inventors. His contributions have not only shaped industries but have also inspired future generations to think outside the box and create a better tomorrow.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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