The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 1997
Filed:
Mar. 13, 1996
Michael G Ward, Saco, ME (US);
Roy L Yarbrough, Hiram, ME (US);
Jay R Chapin, South Portland, ME (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A power-up circuit with hysteretic characteristics for regulating the activation of one or more output buffers of an extended logic circuit. The hysteresis of the power-up circuit of the invention permits turn on of a switching transistor of the circuit at one threshold voltage level and maintains the active state of that switching transistor until a second lower threshold voltage level. The hysteresis is achieved by providing two separate and electrically isolated control paths that are connected to the control node of the switching transistor. The first control path includes a plurality of diode devices designed to regulate the power supply level required to turn on the switching transistor. The second control path also includes diode devices but in lesser numbers so that, once the switching transistor is turned on by the first control path, it remains on in spite of fluctuations at the power supply rail.