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For the Inventor, By the Inventor

Plano, TX, United States of America

Robert Yung-Hsi Tsu

This inventor holds 24 USPTO granted patents, primarily in Semiconductor Manufacturing. Top assignees: Texas Instruments Corporation, Hitachi, Ltd., Other. Active years: 1995-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Robert Yung-Hsi Tsu. Retrieved from https://idiyas.com/inventor/robert-yung-hsi-tsu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 24

% Patents Active = 100.0

Average Co-Inventor Count = 2.5

ph-index = 13

Forward Citations = 562(Granted Patents)


Location History:

  • Dallas, TX (US) (1995)
  • Plano, TX (US) (1995 - 2008)

Company Filing History:

goldMedal21 out of 29,888 
 
Texas Instruments Corporation
 patents
silverMedal1 out of 42,731 
 
Hitachi, Ltd.
 patents
bronzeMedal3 out of 834,513 
Other
 patents
where one patent can have more than one assignee

Years Active: 1995-2008

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Areas of Expertise:
Dielectric Layer
Copper Interconnection
Integrated Circuit
DRAM Design
Capacitor Fabrication
Barium Strontium Titanate
Oxide Filling
Polysilicon Structure
Reliability Enhancement
Thin Films
High-Dielectric-Materials
Storage Capacitor
24 patents (USPTO):Explore Patents
1. 7402514 - Line-to-line reliability enhancement using a dielectric liner for a low dielectric constant interlevel and intralevel (or intermetal and intrametal) dielectric layer (2008-07-22),
2. 6951812 - Copper transition layer for improving copper interconnection reliability (2005-10-04),
3. 6696337 - Method of manufacturing a semiconductor integrated circuit device having a memory cell array and a peripheral circuit region (2004-02-24),
4. 6693356 - Copper transition layer for improving copper interconnection reliability (2004-02-17),
5. 6653676 - Integrated circuit capacitor (2003-11-25),
6. 6528888 - Integrated circuit and method (2003-03-04),
7. 6461955 - Yield improvement of dual damascene fabrication through oxide filling (2002-10-08),
8. 6417045 - Method of manufacturing a semiconductor integrated circuit device including a DRAM having reduced parasitic bit line capacity (2002-07-09),
9. 6331325 - Barium strontium titanate (BST) thin films using boron (2001-12-18),
10. 6294420 - Integrated circuit capacitor (2001-09-25),
11. 6207561 - Selective oxidation methods for metal oxide deposition on metals in capacitor fabrication (2001-03-27),
12. 6194292 - Method of fabricating in-situ doped rough polycrystalline silicon using a single wafer reactor (2001-02-27),
13. 6168985 - Semiconductor integrated circuit device including a DRAM having reduced parasitic bit line capacity and method of manufacturing same (2001-01-02),
14. 6096597 - Method for fabricating an integrated circuit structure (2000-08-01),
15. 6060354 - In-situ doped rough polysilicon storage cell structure formed using gas (2000-05-09),

Title: Robert Yung-Hsi Tsu: A Pioneer in Semiconductor Innovations

Introduction

Robert Yung-Hsi Tsu is a notable inventor based in Plano, TX, USA, known for his significant contributions to the field of semiconductor technology. With an impressive portfolio of 24 patents, Tsu has engineered innovative solutions that enhance the reliability and performance of electronic components.

Latest Patents

Among his latest patents is a groundbreaking method for line-to-line reliability enhancement utilizing a dielectric liner in low dielectric constant interlevel and intralevel layers. This invention presents a method for creating connections between conductors by meticulously forming openings in insulating layers, significantly reducing leakage properties, and improving overall efficiency.

Another vital patent focuses on improving copper interconnection reliability through the introduction of a copper transition layer. This innovative structure includes a barrier layer that seals copper while employing a copper-doped transition layer that strengthens the bond with copper, thereby enhancing electromigration reliability in integrated circuits.

Career Highlights

Robert Tsu has made his mark in the semiconductor industry through his tenure at Texas Instruments Corporation, among other institutions. His technical acumen and valuable insights have led to significant advancements in semiconductor device fabrication and performance.

Collaborations

Throughout his career, Tsu has collaborated with eminent colleagues, including Isamu Asano and William R. McKee. Their teamwork has fostered a dynamic environment for innovation, driving forward the boundaries of semiconductor research and development.

Conclusion

Robert Yung-Hsi Tsu's contributions to semiconductor technology are notable and truely impactful. His patented innovations not only demonstrate his ingenuity as an inventor but also enhance the reliability of electronic systems, marking him as a key player in the industry. Through collaboration and dedication to excellence, Tsu continues to inspire future generations of inventors and engineers in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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