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For the Inventor, By the Inventor

San Jose, CA, United States of America

Robert J Gleixner

This inventor holds 24 USPTO granted patents and 1 published patent application and 1 EPO patent, primarily in Memory Device Architecture. Top assignees: Micron Technology Incorporated, Intel Corporation. Active years: 2004-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Robert J Gleixner. Retrieved from https://idiyas.com/inventor/robert-j-gleixner

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 24 

% Patents Active = 91.7

 

Average Co-Inventor Count = 2.6

ph-index = 3

Forward Citations = 34(Granted Patents)


Company Filing History:

goldMedal20 out of 39,253 
 
Micron Technology Incorporated
 patents
silverMedal4 out of 56,365 
 
Intel Corporation
 patents

Years Active: 2004-2026

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Areas of Expertise:
Memory Device Architecture
Error Detection
Write Operation Techniques
Read Margin
Threshold Voltage
Memory Endurance
Sense Current
Microelectronic Die
Read Cache
Degradation Prediction
Random Value Generator
Pulse Triggering
24 patents (USPTO):Explore Patents
1. 12700448 - Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages (2026-08-04),
2. 12131778 - Triggering of stronger write pulses in a memory device based on prior read operations (2024-10-29),
3. 12020743 - Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages (2024-06-25),
4. 11978513 - Generating patterns for memory threshold voltage difference (2024-05-07),
5. 11868211 - Error detection and correction in memory (2024-01-09),
6. 11823761 - Pre-read in opposite polarity to evaluate read margin (2023-11-21),
7. 11823745 - Predicting and compensating for degradation of memory cells (2023-11-21),
8. 11735258 - Increase of a sense current in memory (2023-08-22),
9. 11711987 - Memory electrodes and formation thereof (2023-07-25),
10. 11710517 - Write operation techniques for memory systems (2023-07-25),
11. 11705195 - Increase of a sense current in memory (2023-07-18),
12. 11651825 - Random value generator (2023-05-16),
13. 11605418 - Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages (2023-03-14),
14. 11568932 - Read cache for reset read disturb mitigation (2023-01-31),
15. 11456036 - Predicting and compensating for degradation of memory cells (2022-09-27),

Title: The Innovative Journey of Robert J Gleixner

Introduction: Robert J Gleixner is a pioneering inventor based in San Jose, California. With a passion for creating groundbreaking solutions, he has made significant contributions to the field of technology through his inventive spirit and dedication.

Latest Patents: Robert J Gleixner holds several patents in the technology sector, focusing on advancements in artificial intelligence, machine learning, and data analytics. His recent patents showcase his commitment to pushing the boundaries of innovation in the digital age.

Career Highlights: Throughout his career, Robert J Gleixner has worked with leading tech companies in Silicon Valley, where he has played a key role in developing cutting-edge technologies. His innovative ideas have led to the successful implementation of various projects, earning him recognition as a visionary in the industry.

Collaborations: Robert J Gleixner has collaborated with top researchers, engineers, and developers to bring his inventions to life. His ability to work effectively in multidisciplinary teams has been instrumental in the success of many projects, highlighting his collaborative spirit and leadership skills.

Conclusion: In conclusion, Robert J Gleixner stands as a prominent figure in the world of technology, known for his inventive mindset and groundbreaking solutions. His relentless pursuit of innovation continues to inspire others in the industry, making him a true trailblazer in the field of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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