Robert J Allen

This inventor holds 45 USPTO granted patents and 2 published patent applications, plus 1 CIPO patent, primarily in Integrated Circuit Design. Top assignee: International Business Machines Corporation. Active years: 2003-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Robert J Allen. Retrieved from https://idiyas.com/inventor/robert-j-allen-e4060arx

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 45 (Patent Applications = 2)

% Patents Active = 15.6

CIPO Patents = 1 (Patent Applications = 1)

Average Co-Inventor Count = 4.2

ph-index = 10

Forward Citations = 731(Granted Patents)

Company Filing History:

45 out of 166,524

International Business Machines Corporation

patents

Years Active: 2003-2026

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Areas of Expertise:

Timing Analysis

Yield Enhancement

Capacitance Extraction

Integrated Circuits

VLSI Designs

Voronoi Diagrams

Layout Optimization

Signal Identification

Critical Area Computation

Radical Design Restrictions

IC Macro Placing

Hierarchical Design

45 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12783777 - Retargeting-aware fill (2026-11-03),

2. 10949593 - Model order reduction in transistor level timing (2021-03-16),

3. 10394986 - Model order reduction in transistor level timing (2019-08-27),

4. 10380289 - Multi-sided variations for creating integrated circuits (2019-08-13),

5. 10380286 - Multi-sided variations for creating integrated circuits (2019-08-13),

6. 10360329 - Multi-cycle signal identification for static timing analysis (2019-07-23),

7. 10354041 - Process for improving capacitance extraction performance (2019-07-16),

8. 10346569 - Multi-sided variations for creating integrated circuits (2019-07-09),

9. 10031988 - Model order reduction in transistor level timing (2018-07-24),

10. 9886541 - Process for improving capacitance extraction performance (2018-02-06),

11. 9684758 - Generating asserted sensitivities for statistical timing (2017-06-20),

12. 9613171 - Multi-cycle signal identification for static timing analysis (2017-04-04),

13. 9501608 - Timing analysis of circuits using sub-circuit timing models (2016-11-22),

14. 8464189 - Technology migration for integrated circuits with radical design restrictions (2013-06-11),

15. 7961932 - Method and apparatus for manufacturing diamond shaped chips (2011-06-14),

As a client, you may appreciate learning about the innovative inventor Robert J Allen from Jericho, VT (US) and his remarkable contributions to the field of technology. His passion for innovation and dedication to pushing the boundaries of technology make him a true pioneer in the industry.

Latest Patents: Robert J Allen holds an impressive total of 44 patents, with his latest inventions focusing on "Model Order Reduction in Transistor Level Timing." This method enhances transistor simulation by improving sensitivity to parasitic effects through reduced-order modeling.

Career Highlights: Robert J Allen is currently associated with the renowned International Business Machines Corporation, more commonly known as IBM. His tenure at IBM showcases his commitment to cutting-edge research and development in the technology sector.

Collaborations: Throughout his career, Robert J Allen has collaborated with esteemed colleagues such as Jason D Hibbeler and Robert F Walker. These collaborations have led to groundbreaking advancements in the field of technology and innovation.

Conclusion: In conclusion, Robert J Allen's innovative spirit and dedication to technological advancement continue to inspire the next generation of inventors and innovators. His prolific career at IBM and his numerous patents attest to his significant contributions to the ever-evolving world of technology.

If you would like to discover more about Robert J Allen's inventions, patents, or career journey, feel free to explore further on our website, idiyas.com.

Profile summary based on public USPTO records.