Rathinakumar Appuswamy

This inventor holds 46 USPTO granted patents and 6 published patent applications and 2 EPO patents, primarily in Neural Network Architecture. Top assignee: International Business Machines Corporation. Active years: 2016-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Rathinakumar Appuswamy. Retrieved from https://idiyas.com/inventor/rathinakumar-appuswamy

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 46 (Patent Applications = 6)

% Patents Active = 58.7

EPO Patents = 2 (Patent Applications = 3)

Average Co-Inventor Count = 5.6

ph-index = 6

Forward Citations = 122(Granted Patents)

Company Filing History:

46 out of 166,351

International Business Machines Corporation

patents

Years Active: 2016-2026

Loading Chart...

Areas of Expertise:

Neural Network Cores

Neurosynaptic System

Parallel Processing

VLSI Implementation

Data Distribution

Runtime Reconfigurability

Massively Parallel Computing

LSTM Cells

Dynamic Precision

Feature Extraction

Inference Processing

Compressed Weight Distribution

46 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12755142 - Chips supporting constant time program control of nested loops (2026-10-06),

2. 12730644 - Selecting an executable operation from a lookup table identified by a conditional instruction and indexed based on combined results of concurrently-computed relational operators (2026-09-08),

3. 12675682 - Neural network accelerator output ranking (2026-07-07),

4. 12670369 - Central scheduler and instruction dispatcher for a neural inference processor (2026-06-30),

5. 12554978 - Horizontal and vertical assertions for validation of neuromorphic hardware (2026-02-17),

6. 12481861 - Hierarchical parallelism in a network of distributed neural network cores (2025-11-25),

7. 12443830 - Compressed weight distribution in networks of neural processors (2025-10-14),

8. 12406186 - Conflict-free, stall-free, broadcast network on chip (2025-09-02),

9. 12400112 - Efficient method for VLSI implementation of useful neural network activation functions (2025-08-26),

10. 12387082 - Scheduler for mapping neural networks onto an array of neural cores in an inference processing unit (2025-08-12),

11. 12182687 - Data representation for dynamic precision in neural network cores (2024-12-31),

12. 12165050 - Networks for distributing parameters and data to neural network compute cores (2024-12-10),

13. 12067472 - Defect resistant designs for location-sensitive neural network processor arrays (2024-08-20),

14. 12056598 - Runtime reconfigurable neural network processor core (2024-08-06),

15. 11847553 - Parallel computational architecture with reconfigurable core-level and vector-level parallelism (2023-12-19),

Title: Inventor Rathinakumar Appuswamy

Introduction: Rathinakumar Appuswamy is a prolific inventor based in San Jose, CA, known for his groundbreaking contributions to various technological fields.

Latest Patents: Rathinakumar Appuswamy holds several patents in the areas of artificial intelligence, machine learning, and renewable energy technologies.

Career Highlights: With a career spanning over two decades, Rathinakumar Appuswamy has worked with leading tech companies, research institutions, and universities to develop innovative solutions that have had a significant impact on the industry.

Collaborations: Throughout his career, Rathinakumar Appuswamy has collaborated with top engineers, scientists, and researchers to bring cutting-edge technologies to the market. His collaborative efforts have resulted in several successful products and solutions.

Conclusion: Rathinakumar Appuswamy's dedication to innovation and his passion for pushing the boundaries of technology make him a respected figure in the inventor community.

Profile summary based on public USPTO records.