Noida, India

Prashant Sethia


Average Co-Inventor Count = 5.1

ph-index = 6

Forward Citations = 160(Granted Patents)


Location History:

  • Gautam Budh Nagar, IN (2017)
  • Uttar Pradesh, IN (2014 - 2018)
  • Noida, IN (2017 - 2020)

Company Filing History:


Years Active: 2014-2020

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10 patents (USPTO):Explore Patents

Title: **Prashant Sethia: A Visionary Inventor in Circuit Design**

Introduction

Prashant Sethia, an esteemed inventor based in Noida, India, has made significant contributions to the field of circuit design. With a remarkable portfolio of ten patents, he has played a pivotal role in advancing static timing analysis systems, ensuring that digital circuit designs meet stringent operational requirements before fabrication.

Latest Patents

Among his latest innovations are two notable patents. The first, titled "Infinite-depth path-based analysis of operational timing for circuit design," introduces a static timing analysis system aimed at identifying timing violations in digital circuits prior to manufacturing. This system utilizes an infinite-depth path-based analysis (IPBA) approach, achieving reduced pessimism compared to traditional graph-based analysis (GBA) systems while dramatically reducing computational time. Furthermore, it offers greater logic path coverage by organizing circuit design graphs into stages and executing phase propagation in parallel.

The second patent, "Systems and methods for reuse of delay calculation in static timing analysis," outlines methods for performing static timing analysis (STA) where delay calculation results from previous analyses can be reused. This advancement minimizes the need for repeated delay timing calculations on the same circuit design, streamlining the analysis process.

Career Highlights

Prashant currently works at Cadence Design Systems, Inc., a leader in electronic design automation software. His innovative work has established him as a key player in the development of advanced circuit design methodologies. His expertise plays a crucial role in enhancing the efficiency and accuracy of timing analysis within the industry's leading technology platforms.

Collaborations

Throughout his career, Prashant has collaborated with notable colleagues such as Naresh Kumar and Umesh Gupta. Together, they have contributed to groundbreaking advancements in circuit design, leveraging their collective expertise to push the boundaries of technology and innovation.

Conclusion

Prashant Sethia exemplifies the spirit of innovation within the realm of circuit design. His ten patents reflect a commitment to enhancing static timing analysis systems, ultimately leading to more reliable digital circuit designs. With a keen understanding of the intricacies of timing analysis, Prashant continues to influence the field significantly, paving the way for future innovations.

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