The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2014
Filed:
Jul. 12, 2013
Cadence Design Systems, Inc., San Jose, CA (US);
Amit Dhuria, Uttar Pradesh, IN;
Naresh Kumar, Uttar Pradesh, IN;
Umesh Gupta, Uttar Pradesh, IN;
Pradeep Yadav, Uttar Pradesh, IN;
Prashant Sethia, Uttar Pradesh, IN;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
A system and method are provided for generating a structurally-aware timing model for operation of a predetermined circuit design. The timing model is generated to have a plurality of timing arcs representing timing characteristics of the circuit design. Additionally, terminal pairs of the circuit design are evaluated to determine characteristic structural weights for selected paths through the circuit design. The structurally-aware timing model may then be incorporated into a top-level hierarchical circuit design for timing analyses and pessimism removal to arrive at realistic timing characteristics. The structural weights are particularly helpful in an AOCV-type pessimism removal post-process.