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For the Inventor, By the Inventor

Hsinchu, Taiwan

Pin-Shyne Chin

USPTO Granted Patents = 8

Average Co-Inventor Count = 2.2

ph-index = 3

Forward Citations = 28(Granted Patents)


Location History:

  • Hsin-Chu, TW (2003 - 2007)
  • Shinchu, TW (2005 - 2007)

Company Filing History:

goldMedal8 out of 40,635 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2003-2007

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8 patents (USPTO):Explore Patents
1. 7244641 - Process sequence and mask layout to reduce junction leakage for a dual gate MOSFET device (2007-07-17),
2. 7183150 - Resist protect oxide structure of sub-micron salicide process (2007-02-27),
3. 7064371 - Low leakage one transistor static random access memory (2006-06-20),
4. 6852589 - Method to modify 0.25 μm 1T-RAM by extra resist protect oxide (RPO) blocking (2005-02-08),
5. 6849485 - Process sequence and mask layout to reduce junction leakage for a dual gate MOSFET device (2005-02-01),
6. 6815274 - Resist protect oxide structure of sub-micron salicide process (2004-11-09),
7. 6790724 - Low leakage one transistor static random access memory (2004-09-14),
8. 6528422 - Method to modify 0.25&mgr;m 1T-RAM by extra resist protect oxide (RPO) blocking (2003-03-04),
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