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For the Inventor, By the Inventor

Hsinchu, Taiwan

Pin-Shyne Chin

This inventor holds 8 USPTO granted patents and 1 published patent application. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2003-2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Pin-Shyne Chin. Retrieved from https://idiyas.com/inventor/pin-shyne-chin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 8 

% Patents Active = 25.0

Average Co-Inventor Count = 2.2

ph-index = 3

Forward Citations = 28(Granted Patents)


Location History:

  • Hsin-Chu, TW (2003 - 2007)
  • Shinchu, TW (2005 - 2007)

Company Filing History:

goldMedal8 out of 42,810 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2003-2007

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8 patents (USPTO):Explore Patents
1. 7244641 - Process sequence and mask layout to reduce junction leakage for a dual gate MOSFET device (2007-07-17),
2. 7183150 - Resist protect oxide structure of sub-micron salicide process (2007-02-27),
3. 7064371 - Low leakage one transistor static random access memory (2006-06-20),
4. 6852589 - Method to modify 0.25 μm 1T-RAM by extra resist protect oxide (RPO) blocking (2005-02-08),
5. 6849485 - Process sequence and mask layout to reduce junction leakage for a dual gate MOSFET device (2005-02-01),
6. 6815274 - Resist protect oxide structure of sub-micron salicide process (2004-11-09),
7. 6790724 - Low leakage one transistor static random access memory (2004-09-14),
8. 6528422 - Method to modify 0.25&mgr;m 1T-RAM by extra resist protect oxide (RPO) blocking (2003-03-04),

Title: The Innovations of Pin-Shyne Chin

Introduction

Pin-Shyne Chin is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 8 patents. His work focuses on improving the efficiency and performance of MOSFET devices, which are crucial in modern electronics.

Latest Patents

One of his latest patents is titled "Process sequence and mask layout to reduce junction leakage for a dual gate MOSFET device." This invention outlines a method for forming a thin gate insulator layer, which involves several steps including the formation of an active region, the application of a first insulator layer, and the creation of a conductive gate structure. Another notable patent is "Resist protect oxide structure of sub-micron salicide process." This patent describes a new method for creating a Resistance Protective Oxide (RPO) layer, utilizing a layer of ONO that is patterned and wet etched to achieve the desired structure.

Career Highlights

Pin-Shyne Chin is currently employed at Taiwan Semiconductor Manufacturing Company Ltd., where he continues to innovate and develop new technologies. His expertise in semiconductor processes has positioned him as a key figure in the industry.

Collaborations

Throughout his career, Chin has collaborated with several talented individuals, including Ming-Chang Hsieh and Hung-Chih Tsai. These collaborations have further enhanced his research and development efforts.

Conclusion

Pin-Shyne Chin's contributions to semiconductor technology through his patents and collaborations highlight his importance in the field. His innovative approaches continue to influence the development of advanced electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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