San Jose, CA, United States of America

Peipei Wang

USPTO Granted Patents = 3 

Average Co-Inventor Count = 5.6

ph-index = 1

Forward Citations = 12(Granted Patents)


Company Filing History:


Years Active: 2020-2024

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3 patents (USPTO):

Title: Peipei Wang: Innovator in Integrated Circuit Technology

Introduction

Peipei Wang is a notable inventor based in San Jose, California. He has made significant contributions to the field of integrated circuit technology, holding a total of 3 patents. His work focuses on enhancing the efficiency and interoperability of electronic packages.

Latest Patents

Wang's latest patents include the "Scalable and Interoperable PHYLESS Die-to-Die IO Solution." This invention involves multi-die packages with interconnects between the dies, allowing for improved communication and functionality. Another significant patent is the "Power-Forwarding Bridge for Inter-Chip Data Signal Transfer." This integrated circuit package features a bridge die embedded within a dielectric, facilitating efficient data signal transfer between chips.

Career Highlights

Peipei Wang is currently employed at Intel Corporation, where he continues to innovate and develop cutting-edge technologies. His expertise in integrated circuits has positioned him as a key player in the advancement of electronic packaging solutions.

Collaborations

Wang collaborates with talented individuals such as Gerald S Pasdast and Lakshmipriya Seshan, who contribute to his projects and enhance the innovation process.

Conclusion

Peipei Wang's contributions to integrated circuit technology exemplify his commitment to innovation and excellence. His patents reflect a deep understanding of electronic systems and a drive to improve their functionality.

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