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For the Inventor, By the Inventor

San Jose, CA, United States of America

Peipei Wang

This inventor holds 8 USPTO granted patents and 3 published patent applications. Top assignee: Intel Corporation. Active years: 2020-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Peipei Wang. Retrieved from https://idiyas.com/inventor/peipei-wang-su1cqkk8

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 8 

% Patents Active = 62.5

Average Co-Inventor Count = 5.1

ph-index = 1

Forward Citations = 15(Granted Patents)


Company Filing History:

goldMedal8 out of 56,290 
 
Intel Corporation
 patents

Years Active: 2020-2026

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8 patents (USPTO):Explore Patents
1. 12719655 - Clock phase management for die-to-die (D2D) interconnect (2026-08-25),
2. 12599033 - Quasi-monolithic integrated packaging architecture with mid-die serializer/deserializer (2026-04-07),
3. 12591727 - Lane repair and lane reversal implementation for die-to-die (D2D) interconnects (2026-03-31),
4. 12519084 - Forwarded supply voltage for dynamic voltage and frequency scaling with stacked chip packaging architecture (2026-01-06),
5. 12500583 - Clock interpolation system for eye-centering (2025-12-16),
6. 12159840 - Scalable and interoperable PHYLESS die-to-die IO solution (2024-12-03),
7. 12100662 - Power-forwarding bridge for inter-chip data signal transfer (2024-09-24),
8. 10686582 - Clock phase compensation apparatus and method (2020-06-16),

Title: Peipei Wang: Innovator in Integrated Circuit Technology

Introduction

Peipei Wang is a notable inventor based in San Jose, California. He has made significant contributions to the field of integrated circuit technology, holding a total of 8 patents. His work focuses on enhancing the efficiency and interoperability of electronic packages.

Latest Patents

Wang's latest patents include the "Scalable and Interoperable PHYLESS Die-to-Die IO Solution." This invention involves multi-die packages with interconnects between the dies, allowing for improved communication and functionality. Another significant patent is the "Power-Forwarding Bridge for Inter-Chip Data Signal Transfer." This integrated circuit package features a bridge die embedded within a dielectric, facilitating efficient data signal transfer between chips.

Career Highlights

Peipei Wang is currently employed at Intel Corporation, where he continues to innovate and develop cutting-edge technologies. His expertise in integrated circuits has positioned him as a key player in the advancement of electronic packaging solutions.

Collaborations

Wang collaborates with talented individuals such as Gerald S Pasdast and Lakshmipriya Seshan, who contribute to his projects and enhance the innovation process.

Conclusion

Peipei Wang's contributions to integrated circuit technology exemplify his commitment to innovation and excellence. His patents reflect a deep understanding of electronic systems and a drive to improve their functionality.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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