The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2024

Filed:

Dec. 18, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Zhiguo Qian, Chandler, AZ (US);

Gerald Pasdast, San Jose, CA (US);

Peipei Wang, San Jose, CA (US);

Daniel Krueger, Fort Collins, CO (US);

Edward Burton, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/50 (2006.01); H01L 23/50 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5381 (2013.01); H01L 21/50 (2013.01); H01L 23/50 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 25/0657 (2013.01);
Abstract

An integrated circuit (IC) package, comprising a substrate that comprises a bridge die embedded within a dielectric. A first die comprising a first input/output (I/O) transmitter and a second die comprising a second I/O receiver and electrically coupled to the bridge die. A first signal trace and a first power conductor are within the bridge die. The first signal trace and the first power conductor are electrically coupled to the first I/O transmitter and the second I/O receiver. The first signal trace is to carry a digital signal and the first power conductor to provide a voltage for the second I/O receiver to read the digital signal.


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