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San Jose, CA, United States of America

Paul D Ta

This inventor holds 8 USPTO granted patents. Top assignee: Vlsi Technology, Inc.. Active years: 1991-1997.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Paul D Ta. Retrieved from https://idiyas.com/inventor/paul-d-ta

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 8

% Patents Active = 100.0

Average Co-Inventor Count = 1.4

ph-index = 6

Forward Citations = 109(Granted Patents)

Company Filing History:

Vlsi Technology, Inc.

Years Active: 1991-1997

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8 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 5608357 - High speed phase aligner with jitter removal (1997-03-04),

2. 5523723 - Low noise low voltage phase lock loop (1996-06-04),

3. 5515012 - Very low noise, wide frequency range phase lock loop (1996-05-07),

4. 5495184 - High-speed low-power CMOS PECL I/O transmitter (1996-02-27),

5. 5293166 - Digital-to-analog converter and bias compensator therefor (1994-03-08),

6. 5227673 - Differential output buffer with feedback (1993-07-13),

7. 5134316 - Precharged buffer with reduced output voltage swing (1992-07-28),

8. 5070307 - Differential amplifier with enhanced slew rate (1991-12-03),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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