The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 1992

Filed:

Dec. 12, 1990
Applicant:
Inventor:

Paul D Ta, San Jose, CA (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307475 ; 307443 ; 307481 ;
Abstract

A buffer with reduced output swing characterized by a CMOS logic level compatible input, an output adapted to develop a reduced voltage swing output signal, and a precharged converter circuit coupled between the output and the input for converting the input signal to the output signal. The precharged converter circuit includes a voltage range conversion stage coupling the input to the output of the buffer and a precharger stage coupled to the voltage range conversion stage to provide the voltage range conversion stage with a ready supply of charge to quickly change the output signal in response to a change in the input signal. A method for reducing output swing on a buffer includes precharging a voltage range conversion circuit capable of developing an output signal which is variable within an output range and coupling the conversion circuit to an input signal which is variable within an input range which is larger than the output range.


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