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For the Inventor, By the Inventor

San Jose, CA, United States of America

Partha Sarathy Murali

This inventor holds 63 USPTO granted patents and 4 published patent applications, primarily in Low Power Wireless Communication (CPC class H04W). Top assignees: Redpine Signals, Inc., Silicon Laboratories Inc., Ceremorphic, Inc.. Active years: 2007-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Partha Sarathy Murali. Retrieved from https://idiyas.com/inventor/partha-sarathy-murali

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 63 

% Patents Active = 95.2

Average Co-Inventor Count = 2.8

ph-index = 8

Forward Citations = 212(Granted Patents)

Forward Citations (Not Self Cited) = 197(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Hyderabad, IN (2007 - 2011)
  • Los Altos Hills, CA (US) (2011)
  • Cupertino, CA (US) (2016)
  • San Jose, CA (US) (2010 - 2020)
  • Sunnyvale, CA (US) (2020 - 2024)

Company Filing History:

goldMedal39 out of 80 
 
Redpine Signals, Inc.
 patents
silverMedal20 out of 1,785 
 
Silicon Laboratories Inc.
 patents
bronzeMedal4 out of 82 
 
Ceremorphic, Inc.
 patents

Years Active: 2007-2024

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Areas of Expertise:
Low Power
Wireless Communication
Ultra-Low Power
Mesh Network
Multi-Threaded Processor
Bluetooth
Signal Processing
Power Management
Antenna Design
Processor Architecture
MIMO
CORDIC Processor
63 patents (USPTO):Explore Patents
1. 12101658 - Communication processor handling communications protocols on separate threads (2024-09-24),
2. 12045645 - Multi-thread wireless communications processor with granular thread processes (2024-07-23),
3. 12034551 - Ultra low power mesh network (2024-07-09),
4. 11916679 - Apparatus and method to reduce spectral peaks in Bluetooth communications (2024-02-27),
5. 11893249 - System and method for flash and RAM allocation for reduced power consumption in a processor (2024-02-06),
6. 11775306 - Multi-threaded processor with thread granularity (2023-10-03),
7. 11755096 - Method and apparatus for selectable high performance or low power processor system (2023-09-12),
8. 11665008 - Ultra-low power mesh network (2023-05-30),
9. 11537190 - Dual processor system for reduced power application processing (2022-12-27),
10. 11310063 - Ultra-low power mesh network (2022-04-19),
11. 11307779 - System and method for flash and RAM allocation for reduced power consumption in a processor (2022-04-19),
12. 11288072 - Multi-threaded processor with thread granularity (2022-03-29),
13. 11129098 - Multiplexed signal processing system for bluetooth and WLAN transceiver (2021-09-21),
14. 11112849 - Method and apparatus for selectable high performance or low power processor system (2021-09-07),
15. 11112847 - Dual processor power saving architecture communications system (2021-09-07),

Title: The Innovative Contributions of Partha Sarathy Murali

Introduction

Partha Sarathy Murali, based in San Jose, California, is a prominent inventor with an impressive portfolio of 63 patents. His work primarily focuses on advanced communication processing technologies, particularly in multi-thread systems that enhance the efficiency of communication protocols.

Latest Patents

Among his latest innovations are groundbreaking patents that significantly improve communication processors. One such patent, titled "Communication processor handling communications protocols on separate threads," presents a multi-thread communication system capable of managing several communication processors over a single interface. This system processes multiple thread activities on a cycle-by-cycle basis according to a thread map register, optimizing execution order and cycle distribution during operation.

Another noteworthy invention is the patent for a "multi-thread wireless communications processor with granular thread processes." This advanced communication processor adjusts thread allocations based on instruction-level demands for various wireless communications technologies, including WLAN, Bluetooth, Zigbee, and LTE. The system's dynamic thread management process smartly allocates processor cycles in response to real-time loading requirements, ensuring robust performance even under varying network loads.

Career Highlights

Partha has made significant contributions to the field while working at renowned companies such as Redpine Signals and Silicon Laboratories. His expertise in communication technologies has been a key driver in the development of innovative solutions that meet the ever-growing demands of mobile and wireless communications.

Collaborations

Throughout his career, Partha has collaborated with several distinguished colleagues, including Subba Reddy Kallam and Venkat Mattela. These partnerships have fostered a creative environment that encourages the exchange of ideas and the development of transformative technologies in the communication sector.

Conclusion

With a remarkable array of patents and a solid foundation in communication technologies, Partha Sarathy Murali continues to push the boundaries of innovation. His contributions not only enhance communication systems but also pave the way for future advancements in multi-thread processing, solidifying his position as a leading inventor in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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