The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 2024
Filed:
Aug. 02, 2020
Applicant:
Silicon Laboratories Inc., Austin, TX (US);
Inventors:
Subba Reddy Kallam, Sunnyvale, CA (US);
Partha Murali, Sunnyvale, CA (US);
Venkat Mattela, San Jose, CA (US);
Venkata Siva Prasad Pulagam, Secunderabad, IN;
Assignee:
Silicon Laboratories Inc., Austin, TX (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04W 28/02 (2009.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); H04W 4/80 (2018.01); H04W 16/18 (2009.01); H04W 72/54 (2023.01); H04W 72/563 (2023.01); H04W 84/12 (2009.01);
U.S. Cl.
CPC ...
H04W 28/0231 (2013.01); G06F 9/30098 (2013.01); G06F 9/3836 (2013.01); H04W 4/80 (2018.02); H04W 16/18 (2013.01); H04W 72/54 (2023.01); H04W 72/563 (2023.01); H04W 84/12 (2013.01);
Abstract
A multi-thread communication system has several communications processors operative over a single interface for transmitting and receiving packets. The multi-thread communications processor is operative to sequentially handle multiple thread processes for each communications processor on a cycle by cycle basis according to a thread map register which determines the order of execution and how many cycles of a particular thread occur during a canonical interval.