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For the Inventor, By the Inventor

Los Gatos, CA, United States of America

Parag Upadhyaya

This inventor holds 61 USPTO granted patents and 6 published patent applications and 21 EPO patents, primarily in Optical Communication (CPC class H03L). Top assignee: Xilinx, Inc.. Active years: 2012-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Parag Upadhyaya. Retrieved from https://idiyas.com/inventor/parag-upadhyaya

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 61 

% Patents Active = 100.0

 

Average Co-Inventor Count = 2.8

ph-index = 11

Forward Citations = 348(Granted Patents)

Forward Citations (Not Self Cited) = 291(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • San Jose, CA (US) (2012 - 2015)
  • Los Gatos, CA (US) (2014 - 2024)

Company Filing History:

goldMedal61 out of 5,108 
 
Xilinx, Inc.
 patents

Years Active: 2012-2026

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Areas of Expertise:
Wavelength Locking
Optical Modulators
Clock Data Recovery
Integrated Circuits
Voltage Controlled Oscillators
Phase Locked Loop
Signal Generation
Low Power Circuits
Analog Compensation
Inductive Elements
SAR ADC
Duty Cycle Correction
61 patents (USPTO):Explore Patents
1. 12592784 - Transceiver loopback data path (2026-03-31),
2. 12451972 - Methods and apparatuses for wavelength locking for optical wavelength division multiplexed micro-ring modulators (2025-10-21),
3. 12425107 - Methods and apparatuses for maximizing output modulation amplitude for optical wavelength division multiplexed micro-ring modulators (2025-09-23),
4. 12072239 - Circuits and methods for wavelength locking of optical receiver WDM filters (2024-08-27),
5. 11984817 - Low power inverter-based CTLE (2024-05-14),
6. 11735519 - In-package passive inductive element for reflection mitigation (2023-08-22),
7. 11728962 - Multi-phase clock signal generation circuitry (2023-08-15),
8. 11721651 - Communication between integrated circuit (IC) dies in wafer-level fan-out package (2023-08-08),
9. 11695397 - Offset circuitry and threshold reference circuitry for a capture flip-flop (2023-07-04),
10. 11689207 - Wide frequency range voltage controlled oscillators (2023-06-27),
11. 11668874 - Optical filter having a tapered profile (2023-06-06),
12. 11637528 - Wide frequency range voltage controlled oscillators (2023-04-25),
13. 11575497 - Reduced power and area efficient receiver circuitry (2023-02-07),
14. 11469877 - High bandwidth CDR (2022-10-11),
15. 11277144 - Analog-based DC offset compensation (2022-03-15),

Title: The Innovative Journey of Parag Upadhyaya

Introduction: Parag Upadhyaya, a talented inventor based in Los Gatos, CA (US), has made significant contributions to the field of technology with his creative and groundbreaking ideas.

Latest Patents: Parag Upadhyaya holds several patents in the areas of artificial intelligence, machine learning, and renewable energy technologies, showcasing his versatility and forward-thinking approach to innovation.

Career Highlights: With a background in engineering and a passion for problem-solving, Parag Upadhyaya has successfully developed and implemented various cutting-edge solutions that have had a positive impact on industries ranging from healthcare to sustainable energy.

Collaborations: Throughout his career, Parag Upadhyaya has collaborated with leading research institutions, universities, and tech companies to further his inventions and bring them to market, demonstrating his ability to work effectively in multidisciplinary teams.

Conclusion: Parag Upadhyaya's dedication to innovation and his commitment to pushing the boundaries of technology make him a standout figure in the world of inventors, with a promising future ahead in shaping the landscape of tomorrow's inventions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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