San Jose, CA, United States of America

Olivier F Laparra

This inventor holds 6 USPTO granted patents and 3 published patent applications. Top assignees: Vlsi Technology, Inc., Koninklijke Philips Corporation N.v.. Active years: 1997-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Olivier F Laparra. Retrieved from https://idiyas.com/inventor/olivier-f-laparra

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 6 

% Patents Active = 100.0

Average Co-Inventor Count = 2.8

ph-index = 4

Forward Citations = 94(Granted Patents)


Company Filing History:


Years Active: 1997-2004

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6 patents (USPTO):Explore Patents

Title: Olivier F Laparra: Innovator in Semiconductor Technology

Introduction

Olivier F Laparra is a prominent inventor based in San Jose, CA (US). He has made significant contributions to the field of semiconductor technology, holding a total of 6 patents. His work focuses on innovative methods for improving transistor gate structures and isolation processes in integrated circuits.

Latest Patents

One of his latest patents involves the removal of silicon oxynitride material using a wet chemical process after gate etch processing. This method presents a novel approach to forming a transistor gate structure. A gate oxide layer is formed, followed by the deposition of gate material on this layer. A layer of silicon oxynitride is then deposited on the gate material. The entire structure is etched to create a gate structure, leaving a silicon oxynitride region on top. A wet chemical process is subsequently performed to remove this region, allowing for the formation of spacers around the gate structure.

Another significant patent by Laparra addresses trench-diffusion corner rounding in a shallow-trench isolation process. This innovation involves forming an isolation structure on an integrated circuit using a shallow trench isolation process. A layer of buffer oxide is formed on a substrate, followed by a layer of nitride. These layers are patterned to create a trench area, and an oxidation process is performed to ensure rounded corners at the trench perimeter. The substrate is then etched to form a trench within this area.

Career Highlights

Olivier F Laparra has worked with notable companies in the semiconductor industry, including VLSI Technology, Inc. and Koninklijke Philips Corporation N.V. His experience in these organizations has contributed to his expertise and innovative capabilities in the field.

Collaborations

Throughout his career, Laparra has collaborated with esteemed colleagues such as Victor C Liang and Mark Rubin. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas.

Conclusion

Olivier F Laparra is a distinguished inventor whose work in semiconductor technology has led to several important patents. His innovative methods continue to influence the industry and pave the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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