The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 1999
Filed:
Jan. 15, 1997
Jake Haskell, Palo Alto, CA (US);
Olivier Laparra, San Jose, CA (US);
Jie Zheng, Palo Alto, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
A semiconductor device isolating structure and method for forming such a structure. In one embodiment, the semiconductor device isolating structure of the present invention includes a trench formed into a semiconductor substrate. A cross-section of the trench has a first sidewall extending to the bottom surface of the trench, and a second sidewall extending to the bottom surface of the trench. Furthermore, the trench of the present invention also has a first field oxide region formed proximate to the interface of the first sidewall and the top surface of the semiconductor substrate, and a second field oxide region formed proximate to the interface of the second sidewall and the top surface of the semiconductor substrate. As a result, the semiconductor substrate has a first rounded corner formed at the intersection of the top surface of semiconductor substrate and the first sidewall, and a second rounded corner formed at the intersection of the top surface of the semiconductor substrate and the second sidewall. In so doing, the present invention eliminates the sharp upper corners found in conventional trenches formed using prior art shallow trench isolation methods.