Tokyo, Japan

Naoaki Narumi

This inventor holds 4 USPTO granted patents. Top assignees: Nippon Telegraph and Telephone Public Corporation, Takeda Riken Kogyo Kabushiki Kaisha, Takeca Riken Kogyo Kabushiki Kaisha. Active years: 1981-1983.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Naoaki Narumi. Retrieved from https://idiyas.com/inventor/naoaki-narumi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.2

ph-index = 4

Forward Citations = 220(Granted Patents)


Company Filing History:


Years Active: 1981-1983

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4 patents (USPTO):Explore Patents

Title: Naoaki Narumi: Innovator in Semiconductor Memory Technology

Introduction

Naoaki Narumi, an accomplished inventor based in Tokyo, Japan, has made significant contributions to the field of semiconductor technology. With a total of four patents to his name, Narumi specializes in innovations that enhance memory testing devices and methodologies.

Latest Patents

Among Narumi's latest breakthroughs are two notable patents. The first patent describes a **Semiconductor Memory Device Test Apparatus**, which facilitates access to a memory device under test via addresses produced by a pattern generator. It meticulously writes data into the memory, reads the data, and stores comparison outcomes in a fault-address memory. A key feature of this invention is its ability to inhibit counting operations if the retrieved data from the fault-address memory indicates a fault. If discrepancies exceed a designated threshold, a fault signal is triggered for attention.

His second innovation, the **Semiconductor Memory Test Equipment**, enhances testing accuracy by reading a memory under evaluation with addresses sourced from a pattern generator. This apparatus prevents erroneous comparisons through the utilization of block mask memory and enables efficient data transfer processes between a central processor and various memory types.

Career Highlights

Narumi has spent portions of his career with notable organizations, namely Nippon Telegraph and Telephone Public Corporation and Takeda Riken Kogyo Kabushiki Kaisha. His work in these companies has significantly influenced advancements in memory technology and testing methods, establishing him as a leader in his field.

Collaborations

Throughout his journey, Narumi has collaborated with esteemed colleagues such as Kohji Ishikawa and Kenji Kimura. These partnerships have fueled innovation and development within the semiconductor sector, showcasing the power of teamwork in driving technological progress.

Conclusion

Naoaki Narumi stands out as a key inventor in the landscape of semiconductor technology. His extensive patent portfolio and contributions to memory testing underscore his dedication to innovation. As technological demands continue to evolve, Narumi’s work remains influential, providing a strong foundation for future advancements in memory devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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