Nai-Ying Lo

Title: Nai-Ying Lo: Innovator in Wafer Detection Technologies

Introduction

Nai-Ying Lo is a prominent inventor based in Kaohsiung, Taiwan. He has made significant contributions to the field of wafer defect detection, holding a total of 3 patents. His innovative approaches have advanced the technology used in semiconductor manufacturing.

Latest Patents

Nai-Ying Lo's latest patents include a wafer backside defect detection method and apparatus. This method involves cropping off a peripheral edge area of a wafer backside image where at least one notch is located. By connecting adjacent white pixels, multiple abnormal regions are identified. If the total area of the top N abnormal regions exceeds 10% of the wafer's area, it indicates a roughness defect. Conversely, if this area is less than 1% and the largest abnormal region exceeds a predetermined length, a scratch defect is identified. Another notable patent is an automatic detection method and system for identifying cracks on wafer edges. This method integrates several wafer images to create a template image, which is then used to detect edge cracks through a series of image processing steps.

Career Highlights

Nai-Ying Lo is currently employed at United Microelectronics Corporation, a leading company in the semiconductor industry. His work focuses on enhancing the reliability and efficiency of wafer inspection processes. His contributions have been instrumental in improving the quality control measures within the manufacturing sector.

Collaborations

Nai-Ying Lo has collaborated with notable colleagues such as Chia-Feng Hsiao and Chung-Hsuan Wu. These partnerships have fostered innovation and have led to the development of advanced detection technologies in the semiconductor field.

Conclusion

Nai-Ying Lo's work in wafer defect detection exemplifies the importance of innovation in the semiconductor industry. His patents and career achievements highlight his commitment to advancing technology and improving manufacturing processes.