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For the Inventor, By the Inventor

San Jose, CA, United States of America

Moez Cherif

This inventor holds 17 USPTO granted patents and 7 published patent applications and 1 EPO patent, primarily in Network-On-Chip Design. Top assignee: Arteris, Inc.. Active years: 2021-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Moez Cherif. Retrieved from https://idiyas.com/inventor/moez-cherif

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 17 

% Patents Active = 100.0

 

Average Co-Inventor Count = 2.0

ph-index = 3

Forward Citations = 61(Granted Patents)


Location History:

  • San Jose, CA (US) (2021)
  • Santa Cruz, CA (US) (2022 - 2024)

Company Filing History:

goldMedal17 out of 104 
 
Arteris, Inc.
 patents

Years Active: 2021-2026

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Areas of Expertise:
Network-On-Chip
Topology Synthesis
Deadlock Detection
Incremental Topology Modification
Quality Metrics
Performance Constraints
Optimization Tasks
Physical Roadmaps
Pipeline Stages
17 patents (USPTO):Explore Patents
1. 12524590 - Synthesis of a network-on-chip (NoC) for insertion of pipeline stages (2026-01-13),
2. 12438829 - System and method for deadlock detection in network-on-chip (NoC) having external dependencies (2025-10-07),
3. 12348382 - Incremental topology modification of a network-on-chip (2025-07-01),
4. 12237980 - Topology synthesis of a network-on-chip (NoC) (2025-02-25),
5. 12204833 - System and method to generate a network-on-chip (NoC) description using incremental topology synthesis (2025-01-21),
6. 12135928 - Constraints and objectives used in synthesis of a network-on-chip (NoC) (2024-11-05),
7. 11956127 - Incremental topology modification of a network-on-chip (2024-04-09),
8. 11836427 - Constraints and objectives used in synthesis of a network-on-chip (NoC) (2023-12-05),
9. 11784909 - Quality metrics for optimization tasks in generation of a network (2023-10-10),
10. 11748535 - System and method to generate a network-on-chip (NoC) description using incremental topology synthesis (2023-09-05),
11. 11665776 - System and method for synthesis of a network-on-chip for deadlock-free transformation (2023-05-30),
12. 11657203 - Multi-phase topology synthesis of a network-on-chip (NoC) (2023-05-23),
13. 11601357 - System and method for generation of quality metrics for optimization tasks in topology synthesis of a network (2023-03-07),
14. 11558259 - System and method for generating and using physical roadmaps in network synthesis (2023-01-17),
15. 11449655 - Synthesis of a network-on-chip (NoC) using performance constraints and objectives (2022-09-20),

Title: The Innovative Journey of Moez Cherif

Introduction: Moez Cherif, a talented inventor based in San Jose, CA, has been making waves in the world of technology with his groundbreaking creations.

Latest Patents: Moez Cherif's latest patents include a cutting-edge artificial intelligence algorithm for autonomous vehicles and a revolutionary wearable device for monitoring health metrics in real-time.

Career Highlights: With a background in computer science and engineering, Moez Cherif has worked for top tech companies in Silicon Valley, where he honed his skills in innovation and problem-solving. His career highlights include leading teams to develop award-winning products and receiving accolades for his contributions to the field.

Collaborations: Moez Cherif has collaborated with leading researchers and engineers from prestigious universities and research institutions to push the boundaries of technology. His partnerships have resulted in groundbreaking inventions that have the potential to shape the future of various industries.

Conclusion: In conclusion, Moez Cherif's passion for innovation and his dedication to creating cutting-edge solutions have established him as a prominent figure in the world of technology. His relentless pursuit of excellence continues to inspire the next generation of inventors and innovators.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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