IDiyas

For the Inventor, By the Inventor

Saratoga, CA, United States of America

Mei Hsu Wong

USPTO Granted Patents = 16 

Average Co-Inventor Count = 3.9

ph-index = 2

Forward Citations = 16(Granted Patents)


Company Filing History:

goldMedal16 out of 40,635 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2018-2025

Loading Chart...
16 patents (USPTO):
1. 12271667 - System on chip (SOC) current profile model for integrated voltage regulator (IVR) co-design (2025-04-08),
2. 12204825 - Function safety and fault management modeling at electrical system level (ESL) (2025-01-21),
3. 12136609 - Semiconductor device and method of manufacture (2024-11-05),
4. 12038463 - Integrated impedance measurement device and impedance measurement method thereof (2024-07-16),
5. 11940822 - Semiconductor device including a voltage regulator and an integrated circuit module (2024-03-26),
6. 11740272 - Integrated impedance measurement device and impedance measurement method thereof (2023-08-29),
7. 11735565 - Semiconductor device and method of manufacture (2023-08-22),
8. 11671010 - Power delivery for multi-chip-package using in-package voltage regulator (2023-06-06),
9. 11669664 - System on chip (SOC) current profile model for integrated voltage regulator (IVR) co-design (2023-06-06),
10. 11354465 - Function safety and fault management modeling at electrical system level (ESL) (2022-06-07),
11. 11163351 - Power estimation (2021-11-02),
12. 10970439 - System on chip (SOC) current profile model for integrated voltage regulator (IVR) co-design (2021-04-06),
13. 10776538 - Function safety and fault management modeling at electrical system level (ESL) (2020-09-15),
14. 10719648 - System and method for system-level parameter estimation (2020-07-21),
15. 10345883 - Power estimation (2019-07-09),

Title: Innovations and Contributions of Mei Hsu Wong

Introduction

Mei Hsu Wong is a prominent inventor based in Saratoga, California, known for her significant contributions to the field of semiconductor technology. With a remarkable portfolio of 16 patents, she has made strides in the design and verification of electronic systems.

Latest Patents

Among her latest patents is a groundbreaking method for a System on Chip (SOC) current profile model for integrated voltage regulator (IVR) co-design. This method involves extracting a first current profile model corresponding to an SOC at an initial design stage, followed by co-simulation to ensure design data compatibility. Another notable patent focuses on function safety and fault management modeling at the electrical system level (ESL). This innovation provides a comprehensive electronic simulation and modeling of safety circuits, ensuring that the electronic device meets its design specifications.

Career Highlights

Mei Hsu Wong has built her career at Taiwan Semiconductor Manufacturing Company Limited, where she has been instrumental in advancing semiconductor design methodologies. Her work has not only enhanced the efficiency of electronic devices but has also contributed to the safety and reliability of electronic systems.

Collaborations

Throughout her career, Mei has collaborated with esteemed colleagues such as Tze-Chiang Huang and Haohua Zhou, further enriching her contributions to the field.

Conclusion

Mei Hsu Wong's innovative patents and her role at Taiwan Semiconductor Manufacturing Company Limited highlight her significant impact on semiconductor technology. Her work continues to shape the future of electronic design and safety.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…