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For the Inventor, By the Inventor

Ome, Japan

Masayuki Nakamura

This inventor holds 30 USPTO granted patents, primarily in Semiconductor Memory. Top assignees: Hitachi, Ltd., Hitachi Vlsi Engineering Corp., Rising Silicon, Inc.. Active years: 1992-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masayuki Nakamura. Retrieved from https://idiyas.com/inventor/masayuki-nakamura

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 30

% Patents Active = 86.7

Average Co-Inventor Count = 4.0

ph-index = 9

Forward Citations = 356(Granted Patents)


Location History:

  • Ohme, JP (1992 - 1996)
  • Ome, JP (1998 - 2011)

Company Filing History:

goldMedal23 out of 42,726 
 
Hitachi, Ltd.
 patents
silverMedal2 out of 182 
 
Hitachi Vlsi Engineering Corp.
 patents
bronzeMedal2 out of 6 
 
Rising Silicon, Inc.
 patents
4. 2 out of 29,869 
 
Texas Instruments Corporation
 patents
5. 1 out of 1 
 
Hitachi Ltd, of Japan
 patent
6. 1 out of 87 
 
Hitachi Ulsi Engineering Corp.
 patents
7. 1 out of 4 
 
Vlsi Engineering Corporation
 patents
8. 3 out of 834,453 
Other
 patents
where one patent can have more than one assignee

Years Active: 1992-2011

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Areas of Expertise:
Semiconductor Memory
Power Supply Control
High-Speed Data Processing
Layout Optimization
Power Down Mode
Synchronous DRAM
Dynamic RAM
Sense Amplifiers
Electrode Arrangement
Integrated Circuit
Bi-CMOS Technology
Memory Regulator
30 patents (USPTO):Explore Patents
1. RE42659 - Large-capacity semiconductor memory with improved layout for sub-amplifiers to increase speed (2011-08-29),
2. RE41379 - Large-Capacity semiconductor memory with improved layout for sub-amplifiers to increase operational speed (2010-06-14),
3. 7688670 - Semiconductor device with improved power supply control for a plurality of memory arrays (2010-03-30),
4. 7411856 - Semiconductor device with improved power supply arrangement (2008-08-12),
5. 7411855 - Semiconductor device with improved power supply arrangement (2008-08-12),
6. RE40356 - Large-capacity semiconductor memory with improved layout for sub-amplifiers to increase operational speed (2008-06-02),
7. 7298662 - Semiconductor device with power down arrangement for reduce power consumption (2007-11-20),
8. 7082074 - Semiconductor device having a power down mode (2006-07-25),
9. 7072202 - Semiconductor device having a power down mode (2006-07-04),
10. 6870790 - Semiconductor device having a power down mode (2005-03-22),
11. 6680875 - Semiconductor device, such as a synchronous DRAM, including a control circuit for reducing power consumption (2004-01-20),
12. 6563759 - Semiconductor memory device (2003-05-13),
13. 6538945 - Sense amplifiers having reduced Vth deviation (2003-03-25),
14. 6512719 - Semiconductor memory device capable of outputting and inputting data at high speed (2003-01-28),
15. 6287912 - Method of fabricating semiconductor device (2001-09-11),

Title: The Innovative Journey of Masayuki Nakamura

Introduction: Masayuki Nakamura, a talented inventor hailing from Ome, Japan, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Nakamura's latest patents showcase his prowess in developing cutting-edge solutions for various industries, ranging from electronics to healthcare.

Career Highlights: With a career spanning over two decades, Nakamura has established himself as a visionary inventor with a keen eye for identifying gaps in the market and creating novel inventions to address them.

Collaborations: Throughout his career, Nakamura has collaborated with leading research institutions, universities, and tech companies to bring his ideas to life and ensure their successful implementation in the market.

Conclusion: Masayuki Nakamura's relentless pursuit of innovation and his passion for creating solutions that make a difference have solidified his position as a respected inventor in the global technology landscape.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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