The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2003
Filed:
Jun. 04, 2001
Applicant:
Inventors:
Hideharu Yahata, Inagi, JP;
Masashi Horiguchi, Koganei, JP;
Hiroki Fujisawa, Sagamihara, JP;
Tsugio Takahashi, Hachiouji, JP;
Masayuki Nakamura, Ome, JP;
Assignee:
Hitachi, Ltd., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract
In a clock synchronous memory like a double data rate synchronous DRAM, a register is provided which is capable of setting a value (advanced latency) for specifying an input or entry cycle for a read or write command. Further, a timing adjustment register ( ) for delaying a signal by a predetermined cycle time according to the advanced latency set to the register is provided on a signal path in a column address system, which is formed between a column address latch circuit ( ) and a column decoder ( ).