Annaka, Japan

Masatake Nakano

This inventor holds 17 USPTO granted patents and 2 EPO patents, primarily in SOI Wafer Technology. Top assignees: Shin-Etsu Handotai Co., Ltd., Other. Active years: 1993-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masatake Nakano. Retrieved from https://idiyas.com/inventor/masatake-nakano

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0


Average Co-Inventor Count = 2.9

ph-index = 10

Forward Citations = 233(Granted Patents)


Location History:

  • Gunma-ken, JP (2001 - 2003)
  • Gunma, JP (1994 - 2007)
  • Annaka, JP (1993 - 2021)

Company Filing History:


Years Active: 1993-2021

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Areas of Expertise:
Bonded Wafer
SOI Wafer
Semiconductor Device
Thin Film Substrate
Manufacturing Method
Heat Treatment
Oxide Film
Delaminated Wafer
Wafer Fabrication
Uniform Silicon Film
Production Method
Substrate Reclamation
17 patents (USPTO):Explore Patents

Title: Masatake Nakano: Innovator in SOI Wafer Technology

Introduction

Masatake Nakano is a prominent inventor based in Annaka, Japan, known for his significant contributions to the field of semiconductor technology. With a total of 17 patents to his name, Nakano has made remarkable advancements in the production of bonded silicon-on-insulator (SOI) wafers.

Latest Patents

Among his latest patents, Nakano has developed a method for producing bonded SOI wafers. This innovative technique involves bonding a bond wafer and a base wafer, both made of silicon single crystal, with a silicon oxide film placed in between. The process includes preparing a base wafer with specific resistivity and oxygen concentration, forming a silicon oxide film through heat treatment, and thinning the bonded wafer to create an SOI layer. Another notable patent is a method for manufacturing a bonded SOI wafer that prevents single-crystallization of polycrystalline silicon while minimizing warpage of the base wafer. This method enhances the efficiency and reliability of semiconductor devices.

Career Highlights

Throughout his career, Nakano has worked with notable companies, including Shin-Etsu Handotai Co., Ltd. His expertise in semiconductor technology has positioned him as a key figure in the industry, contributing to advancements that have a lasting impact on the field.

Collaborations

Nakano has collaborated with esteemed colleagues such as Kiyoshi Mitani and Masatake Katayama. These partnerships have fostered innovation and have been instrumental in the development of new technologies in the semiconductor sector.

Conclusion

Masatake Nakano's contributions to the field of semiconductor technology, particularly in the area of bonded SOI wafers, highlight his role as a leading inventor. His innovative methods and collaborations continue to influence advancements in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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