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For the Inventor, By the Inventor

Kawasaki, Japan

Masanori Yoshimoto

This inventor holds 15 USPTO granted patents. Top assignees: Fujitsu Corporation, Kyushu Fujitsu Electronics Limited. Active years: 1994-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masanori Yoshimoto. Retrieved from https://idiyas.com/inventor/masanori-yoshimoto

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 15

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 9

Forward Citations = 245(Granted Patents)


Company Filing History:

goldMedal15 out of 39,374 
 
Fujitsu Corporation
 patents
silverMedal3 out of 36 
 
Kyushu Fujitsu Electronics Limited
 patents
where one patent can have more than one assignee

Years Active: 1994-1999

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15 patents (USPTO):Explore Patents
1. 5920117 - Semiconductor device and method of forming the device (1999-07-06),
2. 5861669 - Semiconductor package for surface mounting (1999-01-19),
3. 5831332 - Semiconductor package for surface mounting (1998-11-03),
4. 5786985 - Semiconductor device and semiconductor device unit (1998-07-28),
5. 5728601 - Process for manufacturing a single in-line package for surface mounting (1998-03-17),
6. 5684675 - Semiconductor device unit having holder (1997-11-04),
7. 5659200 - Semiconductor device having radiator structure (1997-08-19),
8. 5637915 - Semiconductor device affixed to an upper and a lower leadframe (1997-06-10),
9. 5574310 - Semiconductor package for surface mounting with reinforcing members on (1996-11-12),
10. 5446317 - Single in-line package for surface mounting (1995-08-29),
11. 5444025 - Process for encapsulating a semiconductor package having a heat sink (1995-08-22),
12. 5409866 - Process for manufacturing a semiconductor device affixed to an upper and (1995-04-25),
13. 5343615 - Semiconductor device and a process for making same having improved leads (1994-09-06),
14. 5305179 - Surface-mounting type semiconductor package having an improved (1994-04-19),
15. 5293064 - Lead frame and method of manufacturing a semiconductor device (1994-03-08),

Title: Masanori Yoshimoto: Innovator in Semiconductor Technology

Introduction

Masanori Yoshimoto is a prominent inventor based in Kawasaki, Japan, known for his significant contributions to semiconductor technology. With a total of 15 patents to his name, he has made remarkable advancements in the field, particularly in the design and functionality of semiconductor devices.

Latest Patents

Yoshimoto's latest patents include innovative designs that enhance the performance and reliability of semiconductor devices. One of his notable inventions is a semiconductor device that features a board with a container part, external-connection nodes, and a semiconductor chip secured on a supporting member. This design ensures that the semiconductor chip is completely covered by a sealing resin, providing robust protection. Another significant patent is for a semiconductor package designed for surface mounting. This package includes a semiconductor chip housed within a body that has interconnection leads extending perpendicularly to the bottom surface, allowing for efficient integration into various applications.

Career Highlights

Throughout his career, Masanori Yoshimoto has worked with leading companies in the technology sector, including Fujitsu Corporation and Kyushu Fujitsu Electronics Limited. His experience in these organizations has allowed him to develop cutting-edge technologies that have had a lasting impact on the semiconductor industry.

Collaborations

Yoshimoto has collaborated with esteemed colleagues such as Michio Sono and Junichi Kasai, contributing to various projects that have advanced semiconductor technology.

Conclusion

Masanori Yoshimoto's innovative work in semiconductor technology has established him as a key figure in the field. His patents reflect a commitment to enhancing device performance and reliability, making significant contributions to the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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